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| author | Vaibhav Hiremath <hvaibhav@ti.com> | 2012-08-15 13:23:25 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2012-08-24 22:06:56 +0200 |
| commit | 53d91034cf29936cabf9a4d59270dc94ed7e6c1d (patch) | |
| tree | 8e96f19f5bfd7287078cac85c38402b72e074b9a /arch/arm/boot/dts/am33xx.dtsi | |
| parent | arm/dts: omap5: Add mmc controller nodes and board data (diff) | |
| download | linux-53d91034cf29936cabf9a4d59270dc94ed7e6c1d.tar.xz linux-53d91034cf29936cabf9a4d59270dc94ed7e6c1d.zip | |
arm/dts: AM33XX: Set the default status of module to "disabled" state
Ideally in common SoC dtsi file should set all modules
to "disabled" state and it should get enabled in respective
EVM/Board dts file as per usage.
This patch sets default status of all modules to "disabled"
state in am33xx.dtsi file. Currently there are no modules
supported as part of Bone and EVM dts support, so care
to add entry "status = "okay"" while adding support for any
module.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/am33xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 59509c48d7e5..5f6c8e33060f 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -102,36 +102,42 @@ compatible = "ti,omap3-uart"; ti,hwmods = "uart1"; clock-frequency = <48000000>; + status = "disabled"; }; uart2: serial@48022000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart2"; clock-frequency = <48000000>; + status = "disabled"; }; uart3: serial@48024000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart3"; clock-frequency = <48000000>; + status = "disabled"; }; uart4: serial@481A6000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart4"; clock-frequency = <48000000>; + status = "disabled"; }; uart5: serial@481A8000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart5"; clock-frequency = <48000000>; + status = "disabled"; }; uart6: serial@481AA000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart6"; clock-frequency = <48000000>; + status = "disabled"; }; i2c1: i2c@44E0B000 { @@ -139,6 +145,7 @@ #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; + status = "disabled"; }; i2c2: i2c@4802A000 { @@ -146,6 +153,7 @@ #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; + status = "disabled"; }; i2c3: i2c@4819C000 { @@ -153,6 +161,7 @@ #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; + status = "disabled"; }; }; }; |