ARM: dts: am43xx: add support for parallel NAND flash

This patch:
 - enables GPMC h/w and ELM h/w engine for AM43xx devices (am4372.dtsi)
 - adds pinmux and DT node for Micron 4K-paged x8 NAND device (MT29F4G08AB)
   present on following boards:

   am43x-epos-evm:
	On this board, NAND Flash control lines are muxed with QSPI, Thus only
        one of the two can be used at a time. Selection is controlled by:
        (a) dynamically driving following GPIO pin from software
            GPMC_A0(GPIO) == 0 NAND is selected (default)
            GPMC_A0(GPIO) == 1 eMMC is selected

Signed-off-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 24 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index eb74ab82aa94..a4555bedd713 100644
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -701,6 +701,30 @@
 			       <&edma 11>;
 			dma-names = "tx", "rx";
 		};
+
+		elm: elm@48080000 {
+			compatible = "ti,am3352-elm";
+			reg = <0x48080000 0x2000>;
+			interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+			ti,hwmods = "elm";
+			clocks = <&l4ls_gclk>;
+			clock-names = "fck";
+			status = "disabled";
+		};
+
+		gpmc: gpmc@50000000 {
+			compatible = "ti,am3352-gpmc";
+			ti,hwmods = "gpmc";
+			clocks = <&l3s_gclk>;
+			clock-names = "fck";
+			reg = <0x50000000 0x2000>;
+			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+			gpmc,num-cs = <7>;
+			gpmc,num-waitpins = <2>;
+			#address-cells = <2>;
+			#size-cells = <1>;
+			status = "disabled";
+		};
 	};
 };