diff options
| author | Rob Herring <robh@kernel.org> | 2021-10-25 01:22:39 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2021-10-26 17:20:51 +0200 |
| commit | 2d3de197a81886aaaff8c1eade17441ce9d61037 (patch) | |
| tree | 2456d872e16f053a4bcf6948aeb598272b55c355 /arch/arm/boot/dts/arm-realview-pb11mp.dts | |
| parent | ARM: dts: arm: Update register-bit-led nodes 'reg' and node names (diff) | |
| download | linux-2d3de197a81886aaaff8c1eade17441ce9d61037.tar.xz linux-2d3de197a81886aaaff8c1eade17441ce9d61037.zip | |
ARM: dts: arm: Update ICST clock nodes 'reg' and node names
Add a 'reg' entry for ICST clock nodes on the Arm Ltd platforms. The 'reg'
entry is the VCO register address. With this, the node name can be updated
to use a generic node name, 'clock-controller', and a unit-address.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Link: https://lore.kernel.org/r/20211024232239.211822-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/arm-realview-pb11mp.dts')
| -rw-r--r-- | arch/arm/boot/dts/arm-realview-pb11mp.dts | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/arm-realview-pb11mp.dts b/arch/arm/boot/dts/arm-realview-pb11mp.dts index 54d4cbd10bdf..295aef448123 100644 --- a/arch/arm/boot/dts/arm-realview-pb11mp.dts +++ b/arch/arm/boot/dts/arm-realview-pb11mp.dts @@ -378,50 +378,57 @@ default-state = "off"; }; - oscclk0: osc0@0c { + oscclk0: clock-controller@c { compatible = "arm,syscon-icst307"; + reg = <0x0c 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0x0C>; clocks = <&xtal24mhz>; }; - oscclk1: osc1@10 { + oscclk1: clock-controller@10 { compatible = "arm,syscon-icst307"; + reg = <0x10 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0x10>; clocks = <&xtal24mhz>; }; - oscclk2: osc2@14 { + oscclk2: clock-controller@14 { compatible = "arm,syscon-icst307"; + reg = <0x14 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0x14>; clocks = <&xtal24mhz>; }; - oscclk3: osc3@18 { + oscclk3: clock-controller@18 { compatible = "arm,syscon-icst307"; + reg = <0x18 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0x18>; clocks = <&xtal24mhz>; }; - oscclk4: osc4@1c { + oscclk4: clock-controller@1c { compatible = "arm,syscon-icst307"; + reg = <0x1c 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0x1c>; clocks = <&xtal24mhz>; }; - oscclk5: osc5@d4 { + oscclk5: clock-controller@d4 { compatible = "arm,syscon-icst307"; + reg = <0xd4 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0xd4>; clocks = <&xtal24mhz>; }; - oscclk6: osc6@d8 { + oscclk6: clock-controller@d8 { compatible = "arm,syscon-icst307"; + reg = <0xd8 0x04>; #clock-cells = <0>; lock-offset = <0x20>; vco-offset = <0xd8>; |