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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2014-10-25 16:48:42 +0200 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-11-02 00:10:25 +0100 |
commit | 9a27b4495888f12a9361dacc8b673e384a50d144 (patch) | |
tree | 0b724cd7df0251f226b3cd87848d89cab5c25f43 /arch/arm/boot/dts/armada-375.dtsi | |
parent | arm: mvebu: Clarify (e)SATA ports info in NETGEAR ReadyNAS 102 .dts file (diff) | |
download | linux-9a27b4495888f12a9361dacc8b673e384a50d144.tar.xz linux-9a27b4495888f12a9361dacc8b673e384a50d144.zip |
ARM: mvebu: Enable the reference clock for timer and watchdog on Armada 375 SoC
Now that the timer and watchdog drivers support the Armada 375 usage of
the reference clock, we can enable it in the devicetree.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1414248522-16055-5-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-375.dtsi')
-rw-r--r-- | arch/arm/boot/dts/armada-375.dtsi | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/armada-375.dtsi b/arch/arm/boot/dts/armada-375.dtsi index de6571445cef..9721e55384ce 100644 --- a/arch/arm/boot/dts/armada-375.dtsi +++ b/arch/arm/boot/dts/armada-375.dtsi @@ -36,6 +36,12 @@ #clock-cells = <0>; clock-frequency = <2000000000>; }; + /* 25 MHz reference crystal */ + refclk: oscillator { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; }; cpus { @@ -366,13 +372,15 @@ <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, <&mpic 5>, <&mpic 6>; - clocks = <&coreclk 0>; + clocks = <&coreclk 0>, <&refclk>; + clock-names = "nbclk", "fixed"; }; watchdog@20300 { compatible = "marvell,armada-375-wdt"; reg = <0x20300 0x34>, <0x20704 0x4>, <0x18254 0x4>; - clocks = <&coreclk 0>; + clocks = <&coreclk 0>, <&refclk>; + clock-names = "nbclk", "fixed"; }; cpurst@20800 { |