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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2014-02-20 12:11:30 +0100
committerJason Cooper <jason@lakedaemon.net>2014-02-22 05:10:52 +0100
commitf327d43da130fe6a4a0b3ecf6ad27eff7fd92877 (patch)
tree17fb2dc21f4279d52d64c2c01b5288b5c1603cc5 /arch/arm/boot/dts/armada-380.dtsi
parentARM: mvebu: use C preprocessor include for Armada 375/38x DTs (diff)
downloadlinux-f327d43da130fe6a4a0b3ecf6ad27eff7fd92877.tar.xz
linux-f327d43da130fe6a4a0b3ecf6ad27eff7fd92877.zip
ARM: mvebu: use GIC_{SPI,PPI} in Armada 375/38x DTs
Instead of hardcoding 0 and 1 to indicate SPI and PPI GIC interrupts, use the definitions of <dt-bindings/interrupt-controller/arm-gic.h> to clarify the Device Tree code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-380.dtsi')
-rw-r--r--arch/arm/boot/dts/armada-380.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index 82b33473a146..678ba3d0c485 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -70,7 +70,7 @@
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>;
interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic 0 29 0x4>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
marvell,pcie-port = <0>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 8>;
@@ -88,7 +88,7 @@
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>;
interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic 0 33 0x4>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
marvell,pcie-port = <1>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 5>;
@@ -106,7 +106,7 @@
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>;
interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic 0 70 0x4>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>;
marvell,pcie-port = <2>;
marvell,pcie-lane = <0>;
clocks = <&gateclk 6>;