diff options
| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2017-03-02 23:42:39 +0100 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-03-08 09:52:55 +0100 |
| commit | 23988bab04575261c74743b2828d624946cd3b57 (patch) | |
| tree | be41ce7d384ddf8c7ea6beff963b21eaad1aac2e /arch/arm/boot/dts/armada-xp-98dx3236.dtsi | |
| parent | ARM: dts: mvebu: Move mv98dx3236 clock bindings (diff) | |
| download | linux-23988bab04575261c74743b2828d624946cd3b57.tar.xz linux-23988bab04575261c74743b2828d624946cd3b57.zip | |
ARM: dts: mvebu: remove unnecessary PCI range from 98dx3236
The Marvell 98dx3236 SoC only has a single PCIe x1 interface. The "Port
0.1 MEM" range was errantly kept when creating a specific dts for the
SoC.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp-98dx3236.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi index 3f3ec9e1f8af..84cc232a29e9 100644 --- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi +++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi @@ -105,8 +105,7 @@ ranges = <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000 /* Port 0.0 registers */ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */ - 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */ - 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 0.1 MEM */>; + 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>; pcie1: pcie@1,0 { device_type = "pci"; |