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author | Andrew Jeffery <andrew@aj.id.au> | 2016-12-06 04:53:48 +0100 |
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committer | Joel Stanley <joel@jms.id.au> | 2017-01-10 11:55:35 +0100 |
commit | 2039f90d136cd5248affb87a780b2ddaae337567 (patch) | |
tree | 967d0a4f3cbb5d61e4a4031490a90faf610af856 /arch/arm/boot/dts/aspeed-g5.dtsi | |
parent | ARM: dts: aspeed-g5: Add syscon and pin controller nodes (diff) | |
download | linux-2039f90d136cd5248affb87a780b2ddaae337567.tar.xz linux-2039f90d136cd5248affb87a780b2ddaae337567.zip |
ARM: dts: aspeed-g5: Add gpio controller to devicetree
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index 6ccabdb90e95..a95c1b08a816 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -898,6 +898,16 @@ reg = <0x1e720000 0x9000>; // 36K }; + gpio: gpio@1e780000 { + #gpio-cells = <2>; + gpio-controller; + compatible = "aspeed,ast2500-gpio"; + reg = <0x1e780000 0x1000>; + interrupts = <20>; + gpio-ranges = <&pinctrl 0 0 220>; + interrupt-controller; + }; + timer: timer@1e782000 { compatible = "aspeed,ast2400-timer"; reg = <0x1e782000 0x90>; |