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author | Andrew Jeffery <andrew@aj.id.au> | 2019-12-03 13:04:05 +0100 |
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committer | Joel Stanley <joel@jms.id.au> | 2019-12-17 03:38:05 +0100 |
commit | 1f3051142b128150160fe61e14fe013053b16a9f (patch) | |
tree | 6e36d0b81a3fd4c7d184a8df3d3afac79fc35e1f /arch/arm/boot/dts/aspeed-g5.dtsi | |
parent | ARM: dts: aspeed-g5: Move EDAC node to APB (diff) | |
download | linux-1f3051142b128150160fe61e14fe013053b16a9f.tar.xz linux-1f3051142b128150160fe61e14fe013053b16a9f.zip |
ARM: dts: aspeed-g5: Use recommended generic node name for SDMC
The EDAC is a sub-function of the SDRAM Memory Controller. Rename the
node to the appropriate generic node name.
Cc: Stefan M Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Stefan Schaeckeler <sschaeck@cisco.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index a35e1bd739af..6d48d39a8daf 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -206,7 +206,7 @@ #size-cells = <1>; ranges; - edac: sdram@1e6e0000 { + edac: memory-controller@1e6e0000 { compatible = "aspeed,ast2500-sdram-edac"; reg = <0x1e6e0000 0x174>; interrupts = <0>; |