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| author | Andrew Jeffery <andrew@aj.id.au> | 2016-12-06 04:53:46 +0100 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2017-01-10 11:55:21 +0100 |
| commit | cec822f89ec19b181dc02e2a0c6441d107d8b4d9 (patch) | |
| tree | a1020f6e1b6d083de778f911ea1fe44fc677616e /arch/arm/boot/dts/aspeed-g5.dtsi | |
| parent | ARM: dts: aspeed-g5: Add SoC Display Controller node (diff) | |
| download | linux-cec822f89ec19b181dc02e2a0c6441d107d8b4d9.tar.xz linux-cec822f89ec19b181dc02e2a0c6441d107d8b4d9.zip | |
ARM: dts: aspeed-g5: Add LPC Controller node
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index c7ff3ea4bf37..1968607326dd 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi @@ -92,6 +92,7 @@ clocks = <&clk_apb>; }; + wdt1: wdt@1e785000 { compatible = "aspeed,wdt"; reg = <0x1e785000 0x1c>; @@ -121,6 +122,36 @@ status = "disabled"; }; + lpc: lpc@1e789000 { + compatible = "aspeed,ast2500-lpc", "simple-mfd"; + reg = <0x1e789000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e789000 0x1000>; + + lpc_bmc: lpc-bmc@0 { + compatible = "aspeed,ast2500-lpc-bmc"; + reg = <0x0 0x80>; + }; + + lpc_host: lpc-host@80 { + compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; + reg = <0x80 0x1e0>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x80 0x1e0>; + + reg-io-width = <4>; + + lhc: lhc@20 { + compatible = "aspeed,ast2500-lhc"; + reg = <0x20 0x24 0x48 0x8>; + }; + }; + }; + uart2: serial@1e78d000 { compatible = "ns16550a"; reg = <0x1e78d000 0x1000>; |