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author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-04-18 12:36:25 +0200 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-05-31 16:42:27 +0200 |
commit | 7d813be676ea73baa9797fecd80e77141151f8df (patch) | |
tree | 40ca277f9f7d6a37fc2edcf9782083bc9eba0a9a /arch/arm/boot/dts/at91-ariag25.dts | |
parent | ARM: at91/at91sam9x5.dtsi: add UART0/1 nodes (diff) | |
download | linux-7d813be676ea73baa9797fecd80e77141151f8df.tar.xz linux-7d813be676ea73baa9797fecd80e77141151f8df.zip |
ARM: at91/at91-ariag25.dts: UART0/1 nodes are disabled
UART0 is moved to generic at91sam9x5.dtsi file.
Both uarts are "disabled" as the corresponding pins on
Aria documentation are shown as GPIOs.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/at91-ariag25.dts')
-rw-r--r-- | arch/arm/boot/dts/at91-ariag25.dts | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/at91-ariag25.dts b/arch/arm/boot/dts/at91-ariag25.dts index a76ea94246a1..cce45f5177f9 100644 --- a/arch/arm/boot/dts/at91-ariag25.dts +++ b/arch/arm/boot/dts/at91-ariag25.dts @@ -21,6 +21,7 @@ serial3 = &usart2; serial4 = &usart3; serial5 = &uart0; + serial6 = &uart1; }; chosen { @@ -112,13 +113,17 @@ status = "okay"; }; + /* + * UART0/1 pins are marked as GPIO on + * Aria documentation. + * Change to "okay" if you need additional serial ports + */ uart0: serial@f8040000 { - compatible = "atmel,at91sam9260-usart"; - reg = <0xf8040000 0x200>; - interrupts = <15 4 5>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart0>; - status = "okay"; + status = "disabled"; + }; + + uart1: serial@f8044000 { + status = "disabled"; }; adc0: adc@f804c000 { |