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author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2020-05-14 07:03:09 +0200 |
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committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2020-05-15 16:50:33 +0200 |
commit | 96f63ffdbc38e1b61e768a47b9c52f42f4c7b846 (patch) | |
tree | fa9c01959bbc87b3ade977fac976e0b8c28e669d /arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | |
parent | ARM: dts: at91: sama5d2: Move flx2 definitions in the SoC dtsi (diff) | |
download | linux-96f63ffdbc38e1b61e768a47b9c52f42f4c7b846.tar.xz linux-96f63ffdbc38e1b61e768a47b9c52f42f4c7b846.zip |
ARM: dts: at91: sama5d2: Move flx1 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-6-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi')
-rw-r--r-- | arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi index bea3d60b9722..a06700e53e4c 100644 --- a/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi +++ b/arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi @@ -36,18 +36,6 @@ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>; uart6: serial@200 { - compatible = "atmel,at91sam9260-usart"; - reg = <0x200 0x200>; - interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>; - dmas = <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(13))>, - <&dma0 - (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | - AT91_XDMAC_DT_PERID(14))>; - dma-names = "tx", "rx"; - clocks = <&pmc PMC_TYPE_PERIPHERAL 20>; - clock-names = "usart"; pinctrl-0 = <&pinctrl_flx1_default>; pinctrl-names = "default"; }; |