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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-18 23:40:01 +0100
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2012-11-18 23:54:31 +0100
commit9e3129e937e2f178d2a003ea45765e5e63e34665 (patch)
treefab157ec8ba266d60c51823a78848528753bac6b /arch/arm/boot/dts/at91sam9g45.dtsi
parentARM: at91sam9: add macb pinctrl support (diff)
downloadlinux-9e3129e937e2f178d2a003ea45765e5e63e34665.tar.xz
linux-9e3129e937e2f178d2a003ea45765e5e63e34665.zip
ARM: at91: fix usart/uart namimg in pinctrl
USART are the full pin uart DBGU the debug Unit UART the two pin uart Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9g45.dtsi')
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 0ad84b6cd039..56ce89615263 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -132,14 +132,14 @@
};
};
- uart0 {
- pinctrl_uart0: uart0-0 {
+ usart0 {
+ pinctrl_usart0: usart0-0 {
atmel,pins =
<1 19 0x1 0x1 /* PB19 periph A with pullup */
1 18 0x1 0x0>; /* PB18 periph A */
};
- pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
+ pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
<1 17 0x2 0x0 /* PB17 periph B */
1 15 0x2 0x0>; /* PB15 periph B */
@@ -147,41 +147,41 @@
};
uart1 {
- pinctrl_uart1: uart1-0 {
+ pinctrl_usart1: usart1-0 {
atmel,pins =
<1 4 0x1 0x1 /* PB4 periph A with pullup */
1 5 0x1 0x0>; /* PB5 periph A */
};
- pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
+ pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
<3 16 0x1 0x0 /* PD16 periph A */
3 17 0x1 0x0>; /* PD17 periph A */
};
};
- uart2 {
- pinctrl_uart2: uart2-0 {
+ usart2 {
+ pinctrl_usart2: usart2-0 {
atmel,pins =
<1 6 0x1 0x1 /* PB6 periph A with pullup */
1 7 0x1 0x0>; /* PB7 periph A */
};
- pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
+ pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
<2 9 0x2 0x0 /* PC9 periph B */
2 11 0x2 0x0>; /* PC11 periph B */
};
};
- uart3 {
- pinctrl_uart3: uart3-0 {
+ usart3 {
+ pinctrl_usart3: usart3-0 {
atmel,pins =
<1 8 0x1 0x1 /* PB9 periph A with pullup */
1 9 0x1 0x0>; /* PB8 periph A */
};
- pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
+ pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
<0 23 0x2 0x0 /* PA23 periph B */
0 24 0x2 0x0>; /* PA24 periph B */
@@ -291,7 +291,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart0>;
+ pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
};
@@ -302,7 +302,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1>;
+ pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
};
@@ -313,7 +313,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
};
@@ -324,7 +324,7 @@
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
+ pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
};