diff options
| author | Boris Brezillon <boris.brezillon@free-electrons.com> | 2017-05-30 11:20:53 +0200 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2017-05-31 11:55:41 +0200 |
| commit | 1004a2977bdc7566bca87c565541c3232ed467c4 (patch) | |
| tree | ff3d3aca77c0e3288c6296263dd0795e60680478 /arch/arm/boot/dts/at91sam9rl.dtsi | |
| parent | ARM: dts: at91: Declare EBI/NAND controllers (diff) | |
| download | linux-1004a2977bdc7566bca87c565541c3232ed467c4.tar.xz linux-1004a2977bdc7566bca87c565541c3232ed467c4.zip | |
ARM: dts: at91: Switch to the new NAND bindings
Use the new EBI/NAND bindings to declare NAND chips and remove old NAND
nodes along the way.
Note that we keep using old bindings in at91rm9200.dtsi because this
SoC is not supported by the EBI driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Peter Rosin <peda@axentia.se>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/at91sam9rl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/at91sam9rl.dtsi | 42 |
1 files changed, 13 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi index d373400cddcd..7768342a6638 100644 --- a/arch/arm/boot/dts/at91sam9rl.dtsi +++ b/arch/arm/boot/dts/at91sam9rl.dtsi @@ -117,23 +117,6 @@ }; }; - nand0: nand@40000000 { - compatible = "atmel,at91rm9200-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x40000000 0x10000000>, - <0xffffe800 0x200>; - atmel,nand-addr-offset = <21>; - atmel,nand-cmd-offset = <22>; - atmel,nand-has-dma; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_nand>; - gpios = <&pioD 17 GPIO_ACTIVE_HIGH>, - <&pioB 6 GPIO_ACTIVE_HIGH>, - <0>; - status = "disabled"; - }; - apb { compatible = "simple-bus"; #address-cells = <1>; @@ -478,6 +461,14 @@ }; }; + ebi { + pinctrl_ebi_addr_nand: ebi-addr-0 { + atmel,pins = + <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, + <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; + }; + }; + fb { pinctrl_fb: fb-0 { atmel,pins = @@ -542,28 +533,21 @@ }; nand { - pinctrl_nand: nand-0 { + pinctrl_nand_rb: nand-rb-0 { atmel,pins = - <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, - <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; + <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; }; - pinctrl_nand0_ale_cle: nand_ale_cle-0 { + pinctrl_nand_cs: nand-cs-0 { atmel,pins = - <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, - <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; + <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; }; - pinctrl_nand0_oe_we: nand_oe_we-0 { + pinctrl_nand_oe_we: nand-oe-we-0 { atmel,pins = <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; }; - - pinctrl_nand0_cs: nand_cs-0 { - atmel,pins = - <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; - }; }; pwm0 { |