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authorLinus Torvalds <torvalds@linux-foundation.org>2014-06-03 01:34:00 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2014-06-03 01:34:00 +0200
commit755a9ba7bf24a45b6dbf8bb15a5a56c8ed12461a (patch)
treead98ee0f336630144e571c9499453c571c6b02c7 /arch/arm/boot/dts/atlas6.dtsi
parentMerge tag 'defconfig-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff)
parentMerge tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kge... (diff)
downloadlinux-755a9ba7bf24a45b6dbf8bb15a5a56c8ed12461a.tar.xz
linux-755a9ba7bf24a45b6dbf8bb15a5a56c8ed12461a.zip
Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next
Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ...
Diffstat (limited to 'arch/arm/boot/dts/atlas6.dtsi')
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi31
1 files changed, 26 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 317bc590a4d0..bb22842a0826 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -39,6 +39,11 @@
};
};
+ arm-pmu {
+ compatible = "arm,cortex-a9-pmu";
+ interrupts = <29>;
+ };
+
axi {
compatible = "simple-bus";
#address-cells = <1>;
@@ -167,6 +172,7 @@
compatible = "sirf,prima2-dspif";
reg = <0xa8000000 0x10000>;
interrupts = <9>;
+ resets = <&rstc 1>;
};
gps@a8010000 {
@@ -174,6 +180,7 @@
reg = <0xa8010000 0x10000>;
interrupts = <7>;
clocks = <&clks 9>;
+ resets = <&rstc 2>;
};
dsp@a9000000 {
@@ -181,6 +188,7 @@
reg = <0xa9000000 0x1000000>;
interrupts = <8>;
clocks = <&clks 8>;
+ resets = <&rstc 0>;
};
};
@@ -298,9 +306,9 @@
reg = <0xb00d0000 0x10000>;
interrupts = <15>;
sirf,spi-num-chipselects = <1>;
- cs-gpios = <&gpio 0 0>;
- sirf,spi-dma-rx-channel = <25>;
- sirf,spi-dma-tx-channel = <20>;
+ dmas = <&dmac1 9>,
+ <&dmac1 4>;
+ dma-names = "rx", "tx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clks 19>;
@@ -313,8 +321,9 @@
reg = <0xb0170000 0x10000>;
interrupts = <16>;
sirf,spi-num-chipselects = <1>;
- sirf,spi-dma-rx-channel = <12>;
- sirf,spi-dma-tx-channel = <13>;
+ dmas = <&dmac0 12>,
+ <&dmac0 13>;
+ dma-names = "rx", "tx";
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clks 20>;
@@ -555,6 +564,18 @@
sirf,function = "usp0_uart_nostreamctrl";
};
};
+ usp0_only_utfs_pins_a: usp0@2 {
+ usp0 {
+ sirf,pins = "usp0_only_utfs_grp";
+ sirf,function = "usp0_only_utfs";
+ };
+ };
+ usp0_only_urfs_pins_a: usp0@3 {
+ usp0 {
+ sirf,pins = "usp0_only_urfs_grp";
+ sirf,function = "usp0_only_urfs";
+ };
+ };
usp1_pins_a: usp1@0 {
usp1 {
sirf,pins = "usp1grp";