diff options
| author | Scott Branden <scott.branden@broadcom.com> | 2017-08-15 19:25:59 +0200 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2017-08-17 19:13:14 +0200 |
| commit | 8b9b666d00986294b223986dbb274ceaf37020bf (patch) | |
| tree | 3d4456f62516fa5f8c7e4a25c9078529489712b4 /arch/arm/boot/dts/bcm-cygnus.dtsi | |
| parent | ARM: dts: cygnus: Fix incorrect UART2 register base (diff) | |
| download | linux-8b9b666d00986294b223986dbb274ceaf37020bf.tar.xz linux-8b9b666d00986294b223986dbb274ceaf37020bf.zip | |
ARM: dts: cygnus: place v3d in proper address ordered location
Move v3d devicetree node to proper address ordered location in Cygnus
dtsi.
Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-cygnus.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm-cygnus.dtsi | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi index e4d07f402531..2077fee9a6e9 100644 --- a/arch/arm/boot/dts/bcm-cygnus.dtsi +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi @@ -366,6 +366,19 @@ brcm,nand-has-wp; }; + v3d: v3d@180a2000 { + compatible = "brcm,cygnus-v3d"; + reg = <0x180a2000 0x1000>; + clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; + clock-names = "v3d_clk"; + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + vc4: gpu { + compatible = "brcm,cygnus-vc4"; + }; + gpio_asiu: gpio@180a5000 { compatible = "brcm,cygnus-asiu-gpio"; reg = <0x180a5000 0x668>; @@ -444,19 +457,6 @@ status = "disabled"; }; - v3d: v3d@180a2000 { - compatible = "brcm,cygnus-v3d"; - reg = <0x180a2000 0x1000>; - clocks = <&mipipll BCM_CYGNUS_MIPIPLL_CH2_V3D>; - clock-names = "v3d_clk"; - interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - vc4: gpu { - compatible = "brcm,cygnus-vc4"; - }; - adc: adc@180a6000 { compatible = "brcm,iproc-static-adc"; #io-channel-cells = <1>; |