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author | Kapil Hali <kapilh@broadcom.com> | 2015-12-05 12:53:42 +0100 |
---|---|---|
committer | Florian Fainelli <f.fainelli@gmail.com> | 2015-12-07 21:26:54 +0100 |
commit | 944725fcfff19d76205ac04d28e6e550ac2b3053 (patch) | |
tree | 2b144516101c065fce07fca86efeeb2ad2794a7e /arch/arm/boot/dts/bcm-nsp.dtsi | |
parent | dt-bindings: add SMP enable-method for Broadcom NSP (diff) | |
download | linux-944725fcfff19d76205ac04d28e6e550ac2b3053.tar.xz linux-944725fcfff19d76205ac04d28e6e550ac2b3053.zip |
ARM: dts: Add SMP support for Broadcom NSP
Add device tree changes required for providing SMP support
for Broadcom Northstar Plus SoC.
Signed-off-by: Kapil Hali <kapilh@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-nsp.dtsi')
-rw-r--r-- | arch/arm/boot/dts/bcm-nsp.dtsi | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 4214818df3a0..10bdef557ba0 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -41,6 +41,27 @@ model = "Broadcom Northstar Plus SoC"; interrupt-parent = <&gic>; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + reg = <0x0>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + next-level-cache = <&L2>; + enable-method = "brcm,bcm-nsp-smp"; + secondary-boot-reg = <0xffff042c>; + reg = <0x1>; + }; + }; + mpcore { compatible = "simple-bus"; ranges = <0x00000000 0x19000000 0x00023000>; |