diff options
| author | Matthew Hagan <mnhagan88@gmail.com> | 2020-06-15 00:19:00 +0200 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-06-17 22:40:42 +0200 |
| commit | ac4e106d8934a5894811fc263f4b03fc8ed0fb7a (patch) | |
| tree | 932ca976120066301e1d890f9c9f19f3ba5887f5 /arch/arm/boot/dts/bcm-nsp.dtsi | |
| parent | ARM: dts: NSP: Disable PL330 by default, add dma-coherent property (diff) | |
| download | linux-ac4e106d8934a5894811fc263f4b03fc8ed0fb7a.tar.xz linux-ac4e106d8934a5894811fc263f4b03fc8ed0fb7a.zip | |
ARM: dts: NSP: Correct FA2 mailbox node
The FA2 mailbox is specified at 0x18025000 but should actually be
0x18025c00, length 0x400 according to socregs_nsp.h and board_bu.c. Also
the interrupt was off by one and should be GIC SPI 151 instead of 150.
Fixes: 17d517172300 ("ARM: dts: NSP: Add mailbox (PDC) to NSP")
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-nsp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm-nsp.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index 920c0f561e5c..3175266ede64 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -259,10 +259,10 @@ status = "disabled"; }; - mailbox: mailbox@25000 { + mailbox: mailbox@25c00 { compatible = "brcm,iproc-fa2-mbox"; - reg = <0x25000 0x445>; - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x25c00 0x400>; + interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; #mbox-cells = <1>; brcm,rx-status-len = <32>; brcm,use-bcm-hdr; |