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| author | Christian Daudt <csd@broadcom.com> | 2013-03-13 23:05:37 +0100 |
|---|---|---|
| committer | Christian Daudt <csd@broadcom.com> | 2013-04-09 18:21:59 +0200 |
| commit | 7f6c62e2695bcb1547afdeb4ad3bcdf8c610be2c (patch) | |
| tree | 3364116b724511b2b3d0ecdacd061938e5d73b27 /arch/arm/boot/dts/bcm11351.dtsi | |
| parent | ARM: bcm281xx: Add L2 cache enable code (diff) | |
| download | linux-7f6c62e2695bcb1547afdeb4ad3bcdf8c610be2c.tar.xz linux-7f6c62e2695bcb1547afdeb4ad3bcdf8c610be2c.zip | |
ARM: bcm281xx: Add DT support for SMC handler
- Adds devicetree binding and documentation for the smc handler
Updates from V1:
- Created this separate patch for the DT portion
- Added SoC compatible to smc binding
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/bcm11351.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm11351.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi index ad135885bd2a..be2a26132376 100644 --- a/arch/arm/boot/dts/bcm11351.dtsi +++ b/arch/arm/boot/dts/bcm11351.dtsi @@ -31,6 +31,11 @@ <0x3ff00100 0x100>; }; + smc@0x3404c000 { + compatible = "bcm,bcm11351-smc", "bcm,kona-smc"; + reg = <0x3404c000 0x400>; //1 KiB in SRAM + }; + uart@3e000000 { compatible = "bcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart"; status = "disabled"; |