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| author | Nicolas Saenz Julienne <nsaenzjulienne@suse.de> | 2019-12-16 12:01:08 +0100 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-01-16 00:41:11 +0100 |
| commit | d5c8dc0d4c880fbde5293cc186b1ab23466254c4 (patch) | |
| tree | 8b7f0ca08050d33c41c0d3290f52e66f745abee8 /arch/arm/boot/dts/bcm2711.dtsi | |
| parent | ARM: dts: bcm283x: Unify CMA configuration (diff) | |
| download | linux-d5c8dc0d4c880fbde5293cc186b1ab23466254c4.tar.xz linux-d5c8dc0d4c880fbde5293cc186b1ab23466254c4.zip | |
ARM: dts: bcm2711: Enable PCIe controller
This enables bcm2711's PCIe bus, which is hardwired to a VIA
Technologies XHCI USB 3.0 controller.
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm2711.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm2711.dtsi | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/bcm2711.dtsi b/arch/arm/boot/dts/bcm2711.dtsi index 5ff4ddca6125..a10c5a68c7a0 100644 --- a/arch/arm/boot/dts/bcm2711.dtsi +++ b/arch/arm/boot/dts/bcm2711.dtsi @@ -309,7 +309,36 @@ #address-cells = <2>; #size-cells = <1>; - ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, + <0x6 0x00000000 0x6 0x00000000 0x40000000>; + + pcie0: pcie@7d500000 { + compatible = "brcm,bcm2711-pcie"; + reg = <0x0 0x7d500000 0x9310>; + device_type = "pci"; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 + IRQ_TYPE_LEVEL_HIGH>; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 + 0x0 0x04000000>; + /* + * The wrapper around the PCIe block has a bug + * preventing it from accessing beyond the first 3GB of + * memory. + */ + dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 + 0x0 0xc0000000>; + brcm,enable-ssc; + }; genet: ethernet@7d580000 { compatible = "brcm,bcm2711-genet-v5"; |