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| author | Jisheng Zhang <Jisheng.Zhang@synaptics.com> | 2018-05-15 08:02:40 +0200 |
|---|---|---|
| committer | Jisheng Zhang <Jisheng.Zhang@synaptics.com> | 2018-05-24 09:16:04 +0200 |
| commit | 1293c2b5d790e7999e3ab90b9ae5f3ea27046286 (patch) | |
| tree | 31b6986241b29e28f2c7fbe557f7c13ac8e2bff9 /arch/arm/boot/dts/berlin2q.dtsi | |
| parent | ARM: dts: berlin2q: add interrupt-affinity to pmu node (diff) | |
| download | linux-1293c2b5d790e7999e3ab90b9ae5f3ea27046286.tar.xz linux-1293c2b5d790e7999e3ab90b9ae5f3ea27046286.zip | |
ARM: dts: berlin2q: add "cache-unified" to l2 node
Without this property, we get this boot warning:
"L2C: device tree omits to specify unified cache"
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Diffstat (limited to 'arch/arm/boot/dts/berlin2q.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index e23c49ae3ec2..7cba798152b9 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -149,6 +149,7 @@ l2: l2-cache-controller@ac0000 { compatible = "arm,pl310-cache"; reg = <0xac0000 0x1000>; + cache-unified; cache-level = <2>; arm,data-latency = <2 2 2>; arm,tag-latency = <2 2 2>; |