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| author | Jisheng Zhang <jszhang@marvell.com> | 2014-12-26 09:58:00 +0100 |
|---|---|---|
| committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-01-07 15:25:37 +0100 |
| commit | 2356d2f3d1b742dacdeb1b0a038ec17f7cc2947f (patch) | |
| tree | 5f585ee3d51a35832bd440e1a2520a2174ec00fc /arch/arm/boot/dts/berlin2q.dtsi | |
| parent | ARM: dts: berlin: add pmu node for BG2Q and BG2CD (diff) | |
| download | linux-2356d2f3d1b742dacdeb1b0a038ec17f7cc2947f.tar.xz linux-2356d2f3d1b742dacdeb1b0a038ec17f7cc2947f.zip | |
ARM: dts: berlin: add PPI cpu mask to twd timer interrupts
According to the gic binding document, "bits[15:8] PPI interrupt cpu
mask. Each bit corresponds to each of the 8 possible cpus attached to
the GIC. A bit set to '1' indicated the interrupt is wired to that
CPU." This patch wants to add the PPI cpu mask for completeness.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/berlin2q.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/berlin2q.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 933dcbbcfc5d..41a683fd079c 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -112,7 +112,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0xad0600 0x20>; clocks = <&chip CLKID_TWD>; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; gic: interrupt-controller@ad1000 { |