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authorRoger Quadros <rogerq@ti.com>2016-03-01 14:44:48 +0100
committerTony Lindgren <tony@atomide.com>2016-03-01 18:58:09 +0100
commit44a3ab68ca090a4796c7d485630edb57856b02ea (patch)
treed517d3a26f84413982184a0840601e2416edb197 /arch/arm/boot/dts/dra62x-j5eco-evm.dts
parentARM: dts: dm814x: dra62x: Fix NAND device nodes (diff)
downloadlinux-44a3ab68ca090a4796c7d485630edb57856b02ea.tar.xz
linux-44a3ab68ca090a4796c7d485630edb57856b02ea.zip
ARM: dts: dm814x: dra62x: Disable wait pin monitoring for NAND
The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and can't be used for wait state insertion for NAND I/O read/write. So disable read/write wait monitoring as per Reference Manual's suggestion [1]. [1] dm814x TRM: SPRUGZ8F: 11.2.4.12.2 NAND Device-Ready Pin Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra62x-j5eco-evm.dts')
-rw-r--r--arch/arm/boot/dts/dra62x-j5eco-evm.dts3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/dra62x-j5eco-evm.dts b/arch/arm/boot/dts/dra62x-j5eco-evm.dts
index b0c8144a6e9e..f820573f4a4a 100644
--- a/arch/arm/boot/dts/dra62x-j5eco-evm.dts
+++ b/arch/arm/boot/dts/dra62x-j5eco-evm.dts
@@ -65,12 +65,9 @@
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
- gpmc,wait-on-read = "true";
- gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
- gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
partition@0 {