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| author | Arnd Bergmann <arnd@arndb.de> | 2015-04-15 21:35:22 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-04-15 21:41:13 +0200 |
| commit | 30ecc84eea691cfb0b731d71839bdcba88df5f75 (patch) | |
| tree | 831527106aaa10e5b13267275a843b50076fb4e5 /arch/arm/boot/dts/dra7.dtsi | |
| parent | Merge tag 'imx-dt-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawn... (diff) | |
| parent | ARM: dts: Update Nanobone dts file (diff) | |
| download | linux-30ecc84eea691cfb0b731d71839bdcba88df5f75.tar.xz linux-30ecc84eea691cfb0b731d71839bdcba88df5f75.zip | |
Merge branch 'omap/dt' into next/late
As pointed out by Stephen Rothwell, commit e52117638b79 ("ARM: dts:
omap3: Add DT entries for OMAP 3 ISP") conflicts with b8845074cfbb
("ARM: dts: omap3: add minimal l4 bus layout with control module support")
in non-obvious ways, causing a build failure when both patches
are present.
This merges the two branches that introduce the respective changes
into the next/late branch to resolve the way that Stephen suggested,
as confirmed by Tony.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lkml.org/lkml/2015/4/6/436
Acked-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra7.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index ce3eb311da1e..a3c32e8ee90f 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -700,7 +700,6 @@ reg = <0x48820000 0x80>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; - ti,timer-dsp; }; timer6: timer@48822000 { @@ -708,8 +707,6 @@ reg = <0x48822000 0x80>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; - ti,timer-dsp; - ti,timer-pwm; }; timer7: timer@48824000 { @@ -717,7 +714,6 @@ reg = <0x48824000 0x80>; interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; - ti,timer-dsp; }; timer8: timer@48826000 { @@ -725,8 +721,6 @@ reg = <0x48826000 0x80>; interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; - ti,timer-dsp; - ti,timer-pwm; }; timer9: timer@4803e000 { @@ -748,7 +742,6 @@ reg = <0x48088000 0x80>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; - ti,timer-pwm; }; timer13: timer@48828000 { |