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authorSekhar Nori <nsekhar@ti.com>2017-08-09 16:02:47 +0200
committerTony Lindgren <tony@atomide.com>2017-08-10 19:30:25 +0200
commitc17133e086994b3626cc373de8ca22cd8d293a0c (patch)
tree1170571d08b9b8096013860c05a3ff6b93c1ae2d /arch/arm/boot/dts/dra71-evm.dts
parentARM: dts: dra71-evm: mdio: Fix impedance values (diff)
downloadlinux-c17133e086994b3626cc373de8ca22cd8d293a0c.tar.xz
linux-c17133e086994b3626cc373de8ca22cd8d293a0c.zip
ARM: dts: dra71-evm: workaround incorrect DP83867 RX_CTRL pin strap
The DRA71 EVM straps the DP83867 GigaBit Ethernet phy's RX_DV/RX_CTRL pin in mode 1. Unfortunately, the phy data manual disallows this. Add "ti,dp83867-rxctrl-strap-quirk" property to the phy's device-tree node to allow kernel to enable software workaround for this incorrect strap setting. This is as suggested by the phy's datamanual and ensures proper operation of this PHY. This needs to be done for both instances of this PHY present on the board. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra71-evm.dts')
-rw-r--r--arch/arm/boot/dts/dra71-evm.dts2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts
index a6298eb56978..9897e8fa6845 100644
--- a/arch/arm/boot/dts/dra71-evm.dts
+++ b/arch/arm/boot/dts/dra71-evm.dts
@@ -191,6 +191,7 @@
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
};
dp83867_1: ethernet-phy@3 {
@@ -199,6 +200,7 @@
ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
ti,min-output-impedance;
+ ti,dp83867-rxctrl-strap-quirk;
};
};