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author | Roger Quadros <rogerq@ti.com> | 2016-04-07 12:25:37 +0200 |
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committer | Tony Lindgren <tony@atomide.com> | 2016-04-12 23:32:02 +0200 |
commit | a23fc15584871ad5a5b6621768a2b17b645ff22d (patch) | |
tree | 1a3087e039b9b5da026c0c40f8670dd438d3e586 /arch/arm/boot/dts/dra72-evm.dts | |
parent | ARM: dts: dm816x: Enable gpio controller for GPMC (diff) | |
download | linux-a23fc15584871ad5a5b6621768a2b17b645ff22d.tar.xz linux-a23fc15584871ad5a5b6621768a2b17b645ff22d.zip |
ARM: dts: dra7x-evm: Provide NAND ready pin
On these boards NAND ready pin status is avilable over
GPMC_WAIT0 pin.
Read speed increases from 13768 KiB/ to 17246 KiB/s.
Write speed was unchanged at 7123 KiB/s.
Measured using mtd_speedtest.ko.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/dra72-evm.dts')
-rw-r--r-- | arch/arm/boot/dts/dra72-evm.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index 4bd639b9ff91..3e63f660cd7c 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -503,6 +503,7 @@ interrupt-parent = <&gpmc>; interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ <1 IRQ_TYPE_NONE>; /* termcount */ + rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */ ti,nand-ecc-opt = "bch8"; ti,elm-id = <&elm>; nand-bus-width = <16>; |