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| author | Beata Michalska <b.michalska@samsung.com> | 2015-03-17 16:21:46 +0100 |
|---|---|---|
| committer | Kukjin Kim <kgene@kernel.org> | 2015-03-17 16:21:46 +0100 |
| commit | 52005dece52703e18af4611e9c15f9d923c737ea (patch) | |
| tree | 5b8a5099a253d9cdce56e6b740efe6c3603d1e75 /arch/arm/boot/dts/exynos3250.dtsi | |
| parent | ARM: dts: Add mclk entry for Peach boards (diff) | |
| download | linux-52005dece52703e18af4611e9c15f9d923c737ea.tar.xz linux-52005dece52703e18af4611e9c15f9d923c737ea.zip | |
ARM: dts: Add assigned clock parents to CMU node for exynos3250
Use assigned-clocks/assigned-clock-parents properties for
CMU clock controller DT node to secure proper clock setup:
switching the two muxes to root oscillator clock is not only
required for proper powering down the ISP power domain,
but it also reduces the risk of accessing the ISP CMU
registers while the ISP power domain remains turned off
(i.e. through the common clock framework by clk_summary)
Signed-off-by: Beata Michalska <b.michalska@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos3250.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/exynos3250.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index 277b48b0b6f9..6d6118e09cd8 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -172,6 +172,10 @@ compatible = "samsung,exynos3250-cmu"; reg = <0x10030000 0x20000>; #clock-cells = <1>; + assigned-clocks = <&cmu CLK_MOUT_ACLK_400_MCUISP_SUB>, + <&cmu CLK_MOUT_ACLK_266_SUB>; + assigned-clock-parents = <&cmu CLK_FIN_PLL>, + <&cmu CLK_FIN_PLL>; }; cmu_dmc: clock-controller@105C0000 { |