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authorBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>2014-09-25 10:40:14 +0200
committerKukjin Kim <kgene.kim@samsung.com>2014-10-20 17:12:42 +0200
commite540920cf21c2764047b8a6ddaeaa0683624e46e (patch)
tree13065a1cdc961163734569049326095de63c908d /arch/arm/boot/dts/exynos4212.dtsi
parentARM: dts: add MFC codec device node for exynos3250 (diff)
downloadlinux-e540920cf21c2764047b8a6ddaeaa0683624e46e.tar.xz
linux-e540920cf21c2764047b8a6ddaeaa0683624e46e.zip
ARM: dts: add CPU nodes for Exynos4 SoCs
Recent patch by Tomasz Figa ("irqchip: gic: Fix core ID calculation when topology is read from DT") fixed GIC driver to filter cluster ID from values returned by cpu_logical_map() for SoCs having registers mapped without per-CPU banking making it is possible to add CPU nodes for Exynos4 SoCs. In case of Exynos SoCs these CPU nodes are also required by future changes adding initialization of cpuidle states in Exynos cpuidle driver through DT. Tested on Origen board (Exynos4210 SoC) and Trats2 (Exynos4412 SoC). Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos4212.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4212.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index 3c00e6ec9302..dd0a43ec56da 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -22,6 +22,23 @@
/ {
compatible = "samsung,exynos4212", "samsung,exynos4";
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@A00 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0xA00>;
+ };
+
+ cpu@A01 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ reg = <0xA01>;
+ };
+ };
+
combiner: interrupt-controller@10440000 {
samsung,combiner-nr = <18>;
};