diff options
| author | Olof Johansson <olof@lixom.net> | 2015-04-03 23:54:13 +0200 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2015-04-03 23:54:13 +0200 |
| commit | 4b3be93dd095af7488b0aee6e53c0e74a6130303 (patch) | |
| tree | 4dec2a7be6baeea03b9fc3c2c5ec4ef2a05d63a3 /arch/arm/boot/dts/exynos4412-odroid-common.dtsi | |
| parent | Merge tag 'v4.0-next-dts' of https://github.com/mbgg/linux-mediatek into next/dt (diff) | |
| parent | ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-level (diff) | |
| download | linux-4b3be93dd095af7488b0aee6e53c0e74a6130303.tar.xz linux-4b3be93dd095af7488b0aee6e53c0e74a6130303.zip | |
Merge tag 'mvebu-dt-4.1-3' of git://git.infradead.org/linux-mvebu into next/dt
Merge "ARM: mvebu: dt changes for v4.1 (round 3)" from Gregory Clement:
mvebu dt changes for v4.1 (part #3)
These changes have no influence on the kernel behavior (except
removing a warning message), but they allow to have a better
representation of the hardware.
- conform L2CC node with ePAPR specification by adding cache-level
- remove cpuclk resources overlapping coredivclk registers on Armada XP
* tag 'mvebu-dt-4.1-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Conform L2CC node with ePAPR specification by adding cache-level
ARM: mvebu: clk: remove cpuclk resources overlapping coredivclk registers on Armada XP
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-odroid-common.dtsi')
0 files changed, 0 insertions, 0 deletions