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author | Sylwester Nawrocki <s.nawrocki@samsung.com> | 2015-02-03 15:06:21 +0100 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2015-02-09 07:18:20 +0100 |
commit | 16696337cac2bed71eca47b7063aa89b31737763 (patch) | |
tree | a5cee0cc6c78abdb1001443793a0bd64f35357a1 /arch/arm/boot/dts/exynos4412-odroid-common.dtsi | |
parent | ARM: dts: Exynos4 and Odroid X2/U3 sound device nodes update (diff) | |
download | linux-16696337cac2bed71eca47b7063aa89b31737763.tar.xz linux-16696337cac2bed71eca47b7063aa89b31737763.zip |
ARM: dts: Switch Odroid X2/U2 to simple-audio-card
Now when the CDCLK I2S output clock can be handled through the clock
API the Odroid X2/U3 can be switched to the simple-audio-card DT binding.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-odroid-common.dtsi')
-rw-r--r-- | arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi index c26b9fbf12c9..abd63366298a 100644 --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi @@ -44,9 +44,7 @@ }; sound: sound { - compatible = "samsung,odroidx2-audio"; - samsung,i2s-controller = <&i2s0>; - samsung,audio-codec = <&max98090>; + compatible = "simple-audio-card"; assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>, <&clock_audss EXYNOS_MOUT_I2S>, <&clock_audss EXYNOS_DOUT_SRP>, @@ -57,6 +55,20 @@ <0>, <192000000>, <19200000>; + + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&link0_codec>; + simple-audio-card,frame-master = <&link0_codec>; + + simple-audio-card,cpu { + sound-dai = <&i2s0 0>; + system-clock-frequency = <19200000>; + }; + + link0_codec: simple-audio-card,codec { + sound-dai = <&max98090>; + clocks = <&i2s0 CLK_I2S_CDCLK>; + }; }; mmc@12550000 { @@ -377,6 +389,7 @@ interrupts = <0 0>; clocks = <&i2s0 CLK_I2S_CDCLK>; clock-names = "mclk"; + #sound-dai-cells = <0>; }; }; |