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author | Krzysztof Kozlowski <krzk@kernel.org> | 2019-09-23 18:15:16 +0200 |
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committer | Krzysztof Kozlowski <krzk@kernel.org> | 2019-10-02 17:39:57 +0200 |
commit | 6f135430d221b8e1c6453321cad35f8fd00f143d (patch) | |
tree | 032cf63c89f295c55e1d36ed12ee84aaaecf7653 /arch/arm/boot/dts/exynos5250.dtsi | |
parent | ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos4412 (diff) | |
download | linux-6f135430d221b8e1c6453321cad35f8fd00f143d.tar.xz linux-6f135430d221b8e1c6453321cad35f8fd00f143d.zip |
ARM: dts: exynos: Remove MCT subnode for interrupt map on Exynos5250
Multi Core Timer node has interrupts routed to two different parents -
GIC and combiner. This was modeled with a interrupt-map within a
subnode but can be expressed in an easier and more common way, directly
in the node itself.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
-rw-r--r-- | arch/arm/boot/dts/exynos5250.dtsi | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 4b43a4878096..bca133c68cf4 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -236,25 +236,14 @@ timer@101c0000 { compatible = "samsung,exynos4210-mct"; reg = <0x101C0000 0x800>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&mct_map>; - interrupts = <0 0>, <1 0>, <2 0>, <3 0>, - <4 0>, <5 0>; clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; - - mct_map: mct-map { - #interrupt-cells = <2>; - #address-cells = <0>; - #size-cells = <0>; - interrupt-map = <0x0 0 &combiner 23 3>, - <0x1 0 &combiner 23 4>, - <0x2 0 &combiner 25 2>, - <0x3 0 &combiner 25 3>, - <0x4 0 &gic 0 120 IRQ_TYPE_LEVEL_HIGH>, - <0x5 0 &gic 0 121 IRQ_TYPE_LEVEL_HIGH>; - }; + interrupts-extended = <&combiner 23 3>, + <&combiner 23 4>, + <&combiner 25 2>, + <&combiner 25 3>, + <&gic 0 120 IRQ_TYPE_LEVEL_HIGH>, + <&gic 0 121 IRQ_TYPE_LEVEL_HIGH>; }; pinctrl_0: pinctrl@11400000 { |