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authorKrzysztof Kozlowski <krzk@kernel.org>2016-05-03 19:37:19 +0200
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-05-31 12:42:38 +0200
commit594127ada6df68306ad5b0307d1e01ffbfe98671 (patch)
treefa48403504edddc051485cfbb22e643caa9386d0 /arch/arm/boot/dts/exynos5410.dtsi
parentARM: dts: exynos: Include common exynos5 in exynos5410.dtsi (diff)
downloadlinux-594127ada6df68306ad5b0307d1e01ffbfe98671.tar.xz
linux-594127ada6df68306ad5b0307d1e01ffbfe98671.zip
ARM: dts: exynos: Enable UART3 on Exynos5410
Just like other Exynos5 family SoCs, this one has four UARTs. Configure clocks for UART3 and enable it. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5410.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5410.dtsi3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 0d555c5b7311..a81a03408a0a 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -218,7 +218,8 @@
};
&serial_3 {
- status = "disabled";
+ clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
+ clock-names = "uart", "clk_uart_baud0";
};
&sromc {