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authorŁukasz Stelmach <l.stelmach@samsung.com>2017-12-11 09:54:15 +0100
committerKrzysztof Kozlowski <krzk@kernel.org>2017-12-11 19:43:12 +0100
commit465def2ad492b84eb2234a8892724df8e1edd580 (patch)
tree04ab3dd667271f00ee8a5166a11cb6b269ca0229 /arch/arm/boot/dts/exynos5420.dtsi
parentARM: dts: exynos: Add G3D power domain to Exynos5250 (diff)
downloadlinux-465def2ad492b84eb2234a8892724df8e1edd580.tar.xz
linux-465def2ad492b84eb2234a8892724df8e1edd580.zip
ARM: dts: exynos: Add DT nodes for PRNG in Exynos5 SoCs
Add nodes for Pseudo Random Number Generator in dts files describing Exynos5 chips. Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5420.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index a44aec348502..3611f5c05235 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1429,6 +1429,11 @@
clock-names = "fin_pll", "mct";
};
+&prng {
+ clocks = <&clock CLK_SSS>;
+ clock-names = "secss";
+};
+
&pwm {
clocks = <&clock CLK_PWM>;
clock-names = "timers";