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authorAndrew Bresticker <abrestic@chromium.org>2013-09-25 23:12:52 +0200
committerTomasz Figa <t.figa@samsung.com>2014-01-08 18:02:43 +0100
commit59d711e9ddd2f68822a2a99fc939e11a9288b73e (patch)
treee0b82bf9b8c9cee448339786f8e4d5d167e1a6e4 /arch/arm/boot/dts/exynos5420.dtsi
parentclk: exynos-audss: add support for Exynos 5420 (diff)
downloadlinux-59d711e9ddd2f68822a2a99fc939e11a9288b73e.tar.xz
linux-59d711e9ddd2f68822a2a99fc939e11a9288b73e.zip
ARM: dts: exynos5420: add input clocks to audss clock controller
Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in) for the AudioSS clock controller. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Acked-by: Mike Turquette <mturquette@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/exynos5420.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 09aa06cb3d3a..25a1120d88a5 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -76,8 +76,8 @@
compatible = "samsung,exynos5420-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
- clocks = <&clock 148>;
- clock-names = "sclk_audio";
+ clocks = <&clock 1>, <&clock 5>, <&clock 148>, <&clock 149>;
+ clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
codec@11000000 {