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author | Javier Martinez Canillas <javier.martinez@collabora.co.uk> | 2015-01-14 16:30:35 +0100 |
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committer | Kukjin Kim <kgene@kernel.org> | 2015-01-14 16:30:35 +0100 |
commit | e5e5c6d14e39236485bdc706b918486511817678 (patch) | |
tree | 4eded117f493ba0ac0535aaeeb85095e69ba8f61 /arch/arm/boot/dts/exynos5800-peach-pi.dts | |
parent | Documentation: dt-bindings: add exynos-chipid binding information (diff) | |
download | linux-e5e5c6d14e39236485bdc706b918486511817678.tar.xz linux-e5e5c6d14e39236485bdc706b918486511817678.zip |
ARM: dts: Add power and lid GPIO keys pinctrl for exynos5250-snow
The Exynos5250 Snow Chromebook has GPIO keys for power and lid
so the SoC I/O pins have to be configured in external interrupt
mode. Currently, this is working without setting the pinctrl
lines but is better to set it explicitly instead of relying on
the previous state of the I/O pins.
The DTS snippets were taken from the downstream ChromeOS tree.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/exynos5800-peach-pi.dts')
0 files changed, 0 insertions, 0 deletions