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authorLinus Walleij <linus.walleij@linaro.org>2017-07-05 16:59:33 +0200
committerLinus Walleij <linus.walleij@linaro.org>2017-08-08 14:20:00 +0200
commitf328c2eac5d729a3654d2cef469b9e4acc338c4e (patch)
tree2c65a0faa5b12dc3f816eccb4dc21ca5752a4da6 /arch/arm/boot/dts/gemini-rut1xx.dts
parentARM: dts: Add DTS file for D-Link DIR-685 (diff)
downloadlinux-f328c2eac5d729a3654d2cef469b9e4acc338c4e.tar.xz
linux-f328c2eac5d729a3654d2cef469b9e4acc338c4e.zip
ARM: dts: gemini: add pin control set-up for the SoC
This adds the basic pin control muliplexing settings for the Gemini SoC: parallel (NOR) flash, SATA, optional IDE, PCI and UART. We also select the right GPIO groups on all applicable systems so that GPIO keys/LEDs work smoothly. We can then build upon this for more complex systems. Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/gemini-rut1xx.dts')
-rw-r--r--arch/arm/boot/dts/gemini-rut1xx.dts39
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/gemini-rut1xx.dts b/arch/arm/boot/dts/gemini-rut1xx.dts
index 7b920bfbda32..3613b264f45f 100644
--- a/arch/arm/boot/dts/gemini-rut1xx.dts
+++ b/arch/arm/boot/dts/gemini-rut1xx.dts
@@ -33,6 +33,7 @@
wakeup-source;
linux,code = <KEY_SETUP>;
label = "Reset to defaults";
+ /* Conflict with TVC */
gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
};
};
@@ -42,12 +43,14 @@
led@7 {
/* FIXME: add the LED color */
label = "rut1xx::gsm";
+ /* Conflict with ICE */
gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
led@31 {
/* FIXME: add the LED color */
label = "rut1xx::power";
+ /* Conflict with NAND CE0 */
gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
@@ -61,5 +64,41 @@
reg = <0x30000000 0x00800000>;
/* TODO: add flash partitions here */
};
+
+ syscon: syscon@40000000 {
+ pinctrl {
+ /*
+ * gpio0bgrp cover line 7 used by GSM LED
+ * gpio0fgrp cover line 17 used by power LED
+ */
+ gpio0_default_pins: pinctrl-gpio0 {
+ mux {
+ function = "gpio0";
+ groups = "gpio0bgrp",
+ "gpio0fgrp";
+ };
+ };
+ /*
+ * gpio1dgrp cover line 28-31 otherwise used
+ * by TVC.
+ */
+ gpio1_default_pins: pinctrl-gpio1 {
+ mux {
+ function = "gpio1";
+ groups = "gpio1dgrp";
+ };
+ };
+ };
+ };
+
+ gpio0: gpio@4d000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_default_pins>;
+ };
+
+ gpio1: gpio@4e000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio1_default_pins>;
+ };
};
};