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authorLinus Torvalds <torvalds@linux-foundation.org>2020-01-19 21:10:28 +0100
committerLinus Torvalds <torvalds@linux-foundation.org>2020-01-19 21:10:28 +0100
commit7008ee121089b8193aea918b98850fe87d996508 (patch)
tree080a92d3b860a82e51a6e24f31e4a8f6897c9b31 /arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard-dvi-svga.dts
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net (diff)
parentriscv: Less inefficient gcc tishift helpers (and export their symbols) (diff)
downloadlinux-7008ee121089b8193aea918b98850fe87d996508.tar.xz
linux-7008ee121089b8193aea918b98850fe87d996508.zip
Merge tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley: "Three fixes for RISC-V: - Don't free and reuse memory containing the code that CPUs parked at boot reside in. - Fix rv64 build problems for ubsan and some modules by adding logical and arithmetic shift helpers for 128-bit values. These are from libgcc and are similar to what's present for ARM64. - Fix vDSO builds to clean up their own temporary files" * tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Less inefficient gcc tishift helpers (and export their symbols) riscv: delete temporary files riscv: make sure the cores stay looping in .Lsecondary_park
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