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authorAlexander Shiyan <shc_work@mail.ru>2013-11-27 12:55:46 +0100
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 14:33:02 +0100
commit0c33f667020232fe3173c18c245f2200cbe8e4f5 (patch)
tree0d83092efa4d9921a67ac98643d9b7b4befcfc19 /arch/arm/boot/dts/imx51-babbage.dts
parentARM: dts: imx51-babbage: Fix chipselect level for dataflash on spi0.1 (diff)
downloadlinux-0c33f667020232fe3173c18c245f2200cbe8e4f5.tar.xz
linux-0c33f667020232fe3173c18c245f2200cbe8e4f5.zip
ARM: dts: imx51-babbage: Define FEC reset pin
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51-babbage.dts')
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index ec2077df9d3d..23c252fb9cbb 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -340,6 +340,7 @@
MX51_PAD_NANDF_CS6__FEC_TDATA3 0x80000000
MX51_PAD_NANDF_CS7__FEC_TX_EN 0x80000000
MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x80000000
+ MX51_PAD_EIM_A20__GPIO2_14 0x85 /* Reset */
>;
};
@@ -483,6 +484,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec>;
phy-mode = "mii";
+ phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <1>;
status = "okay";
};