ARM: dts: Move .dts files to vendor sub-directories

The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>

1 files changed, 0 insertions, 894 deletions

diff --git a/arch/arm/boot/dts/imx51-zii-rdu1.dts b/arch/arm/boot/dts/imx51-zii-rdu1.dts
deleted file mode 100644
index 5d4b29d76585..000000000000
--- a/arch/arm/boot/dts/imx51-zii-rdu1.dts
+++ /dev/null
@@ -1,894 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0 OR MIT)
-/*
- * Copyright (C) 2017 Zodiac Inflight Innovations
- */
-
-/dts-v1/;
-#include "imx51.dtsi"
-#include <dt-bindings/sound/fsl-imx-audmux.h>
-
-/ {
-	model = "ZII RDU1 Board";
-	compatible = "zii,imx51-rdu1", "fsl,imx51";
-
-	chosen {
-		stdout-path = &uart1;
-	};
-
-	/* Will be filled by the bootloader */
-	memory@90000000 {
-		device_type = "memory";
-		reg = <0x90000000 0>;
-	};
-
-	aliases {
-		mdio-gpio0 = &mdio_gpio;
-		rtc0 = &ds1341;
-	};
-
-	clk_26M_osc: 26M_osc {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <26000000>;
-	};
-
-	clk_26M_osc_gate: 26M_gate {
-		compatible = "gpio-gate-clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_clk26mhz>;
-		clocks = <&clk_26M_osc>;
-		#clock-cells = <0>;
-		enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
-	};
-
-	clk_26M_usb: usbhost_gate {
-		compatible = "gpio-gate-clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usbgate26mhz>;
-		clocks = <&clk_26M_osc_gate>;
-		#clock-cells = <0>;
-		enable-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
-	};
-
-	clk_26M_snd: snd_gate {
-		compatible = "gpio-gate-clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_sndgate26mhz>;
-		clocks = <&clk_26M_osc_gate>;
-		#clock-cells = <0>;
-		enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
-	};
-
-	reg_5p0v_main: regulator-5p0v-main {
-		compatible = "regulator-fixed";
-		regulator-name = "5V_MAIN";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		regulator-always-on;
-	};
-
-	reg_3p3v: regulator-3p3v {
-		compatible = "regulator-fixed";
-		regulator-name = "3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-always-on;
-	};
-
-	disp0 {
-		compatible = "fsl,imx-parallel-display";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_ipu_disp1>;
-
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
-			display_in: endpoint {
-				remote-endpoint = <&ipu_di0_disp1>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-
-			display_out: endpoint {
-				remote-endpoint = <&panel_in>;
-			};
-		};
-	};
-
-	panel {
-		/* no compatible here, bootloader will patch in correct one */
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_panel>;
-		power-supply = <&reg_3p3v>;
-		enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
-		status = "disabled";
-
-		port {
-			panel_in: endpoint {
-				remote-endpoint = <&display_out>;
-			};
-		};
-	};
-
-	i2c_gpio: i2c-gpio {
-		compatible = "i2c-gpio";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_swi2c>;
-		gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>, /* sda */
-			<&gpio3 4 GPIO_ACTIVE_HIGH>; /* scl */
-		i2c-gpio,delay-us = <50>;
-		status = "okay";
-
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		sgtl5000: codec@a {
-			compatible = "fsl,sgtl5000";
-			reg = <0x0a>;
-			clocks = <&clk_26M_snd>;
-			VDDA-supply = <&vdig_reg>;
-			VDDIO-supply = <&vvideo_reg>;
-			#sound-dai-cells = <0>;
-		};
-	};
-
-	spi_gpio: spi {
-		compatible = "spi-gpio";
-		#address-cells = <1>;
-		#size-cells = <0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_gpiospi0>;
-		status = "okay";
-
-		sck-gpios = <&gpio4 15 GPIO_ACTIVE_HIGH>;
-		mosi-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>;
-		miso-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
-		num-chipselects = <1>;
-		cs-gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
-
-		eeprom@0 {
-			compatible = "eeprom-93xx46";
-			reg = <0>;
-			spi-max-frequency = <1000000>;
-			spi-cs-high;
-			data-size = <8>;
-		};
-	};
-
-	mdio_gpio: mdio-gpio {
-		compatible = "virtual,mdio-gpio";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_swmdio>;
-		gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>, /* mdc */
-			<&gpio3 25 GPIO_ACTIVE_HIGH>; /* mdio */
-
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		switch@0 {
-			compatible = "marvell,mv88e6085";
-			reg = <0>;
-			dsa,member = <0 0>;
-
-			ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				port@0 {
-					reg = <0>;
-					phy-mode = "rev-mii";
-					ethernet = <&fec>;
-
-					fixed-link {
-						speed = <100>;
-						full-duplex;
-					};
-				};
-
-				port@1 {
-					reg = <1>;
-					label = "netaux";
-				};
-
-				port@3 {
-					reg = <3>;
-					label = "netright";
-				};
-
-				port@4 {
-					reg = <4>;
-					label = "netleft";
-				};
-			};
-		};
-	};
-
-	sound {
-		compatible = "simple-audio-card";
-		simple-audio-card,name = "Front";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,bitclock-master = <&sound_codec>;
-		simple-audio-card,frame-master = <&sound_codec>;
-		simple-audio-card,widgets =
-			"Headphone", "Headphone Jack";
-		simple-audio-card,routing =
-			"Headphone Jack", "TPA6130A2 HPLEFT",
-			"Headphone Jack", "TPA6130A2 HPRIGHT";
-		simple-audio-card,aux-devs = <&hpa1>;
-
-		sound_cpu: simple-audio-card,cpu {
-			sound-dai = <&ssi2>;
-		};
-
-		sound_codec: simple-audio-card,codec {
-			sound-dai = <&sgtl5000>;
-			clocks = <&clk_26M_snd>;
-		};
-	};
-
-	usbh1phy: usbphy1 {
-		compatible = "usb-nop-xceiv";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usbh1phy>;
-		clocks = <&clk_26M_usb>;
-		clock-names = "main_clk";
-		reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
-		vcc-supply = <&vusb_reg>;
-		#phy-cells = <0>;
-	};
-
-	usbh2phy: usbphy2 {
-		compatible = "usb-nop-xceiv";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usbh2phy>;
-		clocks = <&clk_26M_usb>;
-		clock-names = "main_clk";
-		reset-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
-		vcc-supply = <&vusb_reg>;
-		#phy-cells = <0>;
-	};
-};
-
-&audmux {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_audmux>;
-	status = "okay";
-
-	ssi2 {
-		fsl,audmux-port = <1>;
-		fsl,port-config = <
-			(IMX_AUDMUX_V2_PTCR_SYN |
-			 IMX_AUDMUX_V2_PTCR_TFSEL(2) |
-			 IMX_AUDMUX_V2_PTCR_TCSEL(2) |
-			 IMX_AUDMUX_V2_PTCR_TFSDIR |
-			 IMX_AUDMUX_V2_PTCR_TCLKDIR)
-			IMX_AUDMUX_V2_PDCR_RXDSEL(2)
-		>;
-	};
-
-	aud3 {
-		fsl,audmux-port = <2>;
-		fsl,port-config = <
-			IMX_AUDMUX_V2_PTCR_SYN
-			IMX_AUDMUX_V2_PDCR_RXDSEL(1)
-		>;
-	};
-};
-
-&cpu {
-	cpu-supply = <&sw1_reg>;
-};
-
-&ecspi1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ecspi1>;
-	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
-		   <&gpio4 25 GPIO_ACTIVE_LOW>;
-	status = "okay";
-
-	pmic@0 {
-		compatible = "fsl,mc13892";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_pmic>;
-		spi-max-frequency = <6000000>;
-		spi-cs-high;
-		reg = <0>;
-		interrupt-parent = <&gpio1>;
-		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
-		fsl,mc13xxx-uses-adc;
-
-		regulators {
-			sw1_reg: sw1 {
-				regulator-min-microvolt = <600000>;
-				regulator-max-microvolt = <1375000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			sw2_reg: sw2 {
-				regulator-min-microvolt = <900000>;
-				regulator-max-microvolt = <1850000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			sw3_reg: sw3 {
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1850000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			sw4_reg: sw4 {
-				regulator-min-microvolt = <1100000>;
-				regulator-max-microvolt = <1850000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			vpll_reg: vpll {
-				regulator-min-microvolt = <1050000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			vdig_reg: vdig {
-				regulator-min-microvolt = <1650000>;
-				regulator-max-microvolt = <1650000>;
-				regulator-boot-on;
-			};
-
-			vsd_reg: vsd {
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3150000>;
-			};
-
-			vusb_reg: vusb {
-				regulator-always-on;
-			};
-
-			vusb2_reg: vusb2 {
-				regulator-min-microvolt = <2400000>;
-				regulator-max-microvolt = <2775000>;
-				regulator-boot-on;
-				regulator-always-on;
-			};
-
-			vvideo_reg: vvideo {
-				regulator-min-microvolt = <2775000>;
-				regulator-max-microvolt = <2775000>;
-			};
-
-			vaudio_reg: vaudio {
-				regulator-min-microvolt = <2300000>;
-				regulator-max-microvolt = <3000000>;
-			};
-
-			vcam_reg: vcam {
-				regulator-min-microvolt = <2500000>;
-				regulator-max-microvolt = <3000000>;
-			};
-
-			vgen1_reg: vgen1 {
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <1200000>;
-			};
-
-			vgen2_reg: vgen2 {
-				regulator-min-microvolt = <1200000>;
-				regulator-max-microvolt = <3150000>;
-				regulator-always-on;
-			};
-
-			vgen3_reg: vgen3 {
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <2900000>;
-				regulator-always-on;
-			};
-		};
-
-		leds {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			led-control = <0x0 0x0 0x3f83f8 0x0>;
-
-			sysled0@3 {
-				reg = <3>;
-				label = "system:green:status";
-				linux,default-trigger = "default-on";
-			};
-
-			sysled1@4 {
-				reg = <4>;
-				label = "system:green:act";
-				linux,default-trigger = "heartbeat";
-			};
-		};
-	};
-
-	flash@1 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "atmel,at45db642d", "atmel,at45", "atmel,dataflash";
-		spi-max-frequency = <25000000>;
-		reg = <1>;
-	};
-};
-
-&esdhc1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_esdhc1>;
-	bus-width = <4>;
-	no-1-8-v;
-	non-removable;
-	no-sdio;
-	no-sd;
-	status = "okay";
-};
-
-&fec {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_fec>;
-	phy-mode = "mii";
-	phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
-	phy-supply = <&vgen3_reg>;
-	status = "okay";
-};
-
-&gpio1 {
-	gpio-line-names = "", "", "", "",
-			  "", "", "", "",
-			  "", "hp-amp-shutdown-b", "", "",
-			  "", "", "", "",
-			  "", "", "", "",
-			  "", "", "", "",
-			  "", "", "", "",
-			  "", "", "", "";
-
-	unused-sd3-wp-hog {
-		/*
-		 * See pinctrl_esdhc1 below for more details on this
-		 */
-		gpio-hog;
-		gpios = <1 GPIO_ACTIVE_HIGH>;
-		output-high;
-	};
-};
-
-&i2c2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_i2c2>;
-	status = "okay";
-
-	hpa1: amp@60 {
-		compatible = "ti,tpa6130a2";
-		reg = <0x60>;
-		Vdd-supply = <&reg_3p3v>;
-		sound-name-prefix = "TPA6130A2";
-	};
-
-	ds1341: rtc@68 {
-		compatible = "dallas,ds1341";
-		reg = <0x68>;
-	};
-
-	/* touch nodes default disabled, bootloader will enable the right one */
-
-	touchscreen@4b {
-		compatible = "atmel,maxtouch";
-		reg = <0x4b>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_ts>;
-		interrupt-parent = <&gpio3>;
-		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
-		status = "disabled";
-	};
-
-	touchscreen@4c {
-		compatible = "atmel,maxtouch";
-		reg = <0x4c>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_ts>;
-		interrupt-parent = <&gpio3>;
-		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
-		status = "disabled";
-	};
-
-	touchscreen@20 {
-		compatible = "syna,rmi4-i2c";
-		reg = <0x20>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_ts>;
-		interrupt-parent = <&gpio3>;
-		interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
-		status = "disabled";
-
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		rmi4-f01@1 {
-			reg = <0x1>;
-			syna,nosleep-mode = <2>;
-		};
-
-		rmi4-f11@11 {
-			reg = <0x11>;
-			touchscreen-inverted-x;
-			touchscreen-swapped-x-y;
-			syna,sensor-type = <1>;
-		};
-	};
-
-};
-
-&ipu_di0_disp1 {
-	remote-endpoint = <&display_in>;
-};
-
-&pmu {
-	secure-reg-access;
-};
-
-&ssi2 {
-	status = "okay";
-};
-
-&uart1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart1>;
-	status = "okay";
-};
-
-&uart2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart2>;
-	status = "okay";
-};
-
-&uart3 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_uart3>;
-	status = "okay";
-
-	mcu {
-		compatible = "zii,rave-sp-rdu1";
-		current-speed = <38400>;
-		#address-cells = <1>;
-		#size-cells = <1>;
-
-		watchdog {
-			compatible = "zii,rave-sp-watchdog";
-		};
-
-		backlight {
-			compatible = "zii,rave-sp-backlight";
-		};
-
-		pwrbutton {
-			compatible = "zii,rave-sp-pwrbutton";
-		};
-
-		eeprom@a3 {
-			compatible = "zii,rave-sp-eeprom";
-			reg = <0xa3 0x2000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			zii,eeprom-name = "dds-eeprom";
-		};
-
-		eeprom@a4 {
-			compatible = "zii,rave-sp-eeprom";
-			reg = <0xa4 0x4000>;
-			#address-cells = <1>;
-			#size-cells = <1>;
-			zii,eeprom-name = "main-eeprom";
-		};
-
-		eeprom@ae {
-			compatible = "zii,rave-sp-eeprom";
-			reg = <0xae 0x200>;
-			zii,eeprom-name = "switch-eeprom";
-			/*
-			 * Not all RDU1s have this functionality, so we
-			 * rely on the bootloader to enable this
-			 */
-			status = "disabled";
-		};
-	};
-};
-
-&usbh1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usbh1>;
-	dr_mode = "host";
-	phy_type = "ulpi";
-	fsl,usbphy = <&usbh1phy>;
-	disable-over-current;
-	maximum-speed = "full-speed";
-	vbus-supply = <&reg_5p0v_main>;
-	status = "okay";
-};
-
-&usbh2 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_usbh2>;
-	dr_mode = "host";
-	phy_type = "ulpi";
-	fsl,usbphy = <&usbh2phy>;
-	disable-over-current;
-	vbus-supply = <&reg_5p0v_main>;
-	status = "okay";
-};
-
-&usbphy0 {
-	vcc-supply = <&vusb_reg>;
-};
-
-&usbotg {
-	dr_mode = "host";
-	disable-over-current;
-	phy_type = "utmi_wide";
-	vbus-supply = <&reg_5p0v_main>;
-	status = "okay";
-};
-
-&wdog1 {
-	status = "disabled";
-};
-
-&iomuxc {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_hog>;
-
-	pinctrl_hog: hoggrp {
-		fsl,pins = <
-			MX51_PAD_GPIO1_9__GPIO1_9		0x5e
-		>;
-	};
-
-	pinctrl_audmux: audmuxgrp {
-		fsl,pins = <
-			MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0xa5
-			MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x85
-			MX51_PAD_AUD3_BB_CK__AUD3_TXC		0xa5
-			MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x85
-		>;
-	};
-
-	pinctrl_clk26mhz: clk26mhzgrp {
-		fsl,pins = <
-			MX51_PAD_DI1_PIN12__GPIO3_1		0x85
-		>;
-	};
-
-	pinctrl_ecspi1: ecspi1grp {
-		fsl,pins = <
-			MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
-			MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185
-			MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185
-			MX51_PAD_CSPI1_SS0__GPIO4_24		0x85
-			MX51_PAD_CSPI1_SS1__GPIO4_25		0x85
-		>;
-	};
-
-	pinctrl_esdhc1: esdhc1grp {
-		fsl,pins = <
-			MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
-			MX51_PAD_SD1_CLK__SD1_CLK		0x20d5
-			MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5
-			MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5
-			MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5
-			MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5
-			/*
-			 * GPIO1_1 is not directly used by eSDHC1 in
-			 * any capacity, but earlier versions of RDU1
-			 * used that pin as WP GPIO for eSDHC3 and
-			 * because of that that pad has an external
-			 * pull-up resistor. This is problematic
-			 * because out of reset the pad is configured
-			 * as ALT0 which serves as SD1_WP, which, when
-			 * pulled high by and external pull-up, will
-			 * inhibit execution of any write request to
-			 * attached eMMC device.
-			 *
-			 * To avoid this problem we configure the pad
-			 * to ALT1/GPIO and avoid driving SD1_WP
-			 * signal high.
-			 */
-			MX51_PAD_GPIO1_1__GPIO1_1		0x0000
-		>;
-	};
-
-	pinctrl_fec: fecgrp {
-		fsl,pins = <
-			MX51_PAD_EIM_EB2__FEC_MDIO		0x1f5
-			MX51_PAD_NANDF_D9__FEC_RDATA0		0x2180
-			MX51_PAD_EIM_EB3__FEC_RDATA1		0x180
-			MX51_PAD_EIM_CS2__FEC_RDATA2		0x180
-			MX51_PAD_EIM_CS3__FEC_RDATA3		0x180
-			MX51_PAD_EIM_CS4__FEC_RX_ER		0x180
-			MX51_PAD_NANDF_D11__FEC_RX_DV		0x2084
-			MX51_PAD_EIM_CS5__FEC_CRS		0x180
-			MX51_PAD_NANDF_RB2__FEC_COL		0x2180
-			MX51_PAD_NANDF_RB3__FEC_RX_CLK		0x2180
-			MX51_PAD_NANDF_CS2__FEC_TX_ER		0x2004
-			MX51_PAD_NANDF_CS3__FEC_MDC		0x2004
-			MX51_PAD_NANDF_D8__FEC_TDATA0		0x2180
-			MX51_PAD_NANDF_CS4__FEC_TDATA1		0x2004
-			MX51_PAD_NANDF_CS5__FEC_TDATA2		0x2004
-			MX51_PAD_NANDF_CS6__FEC_TDATA3		0x2004
-			MX51_PAD_DISP2_DAT9__FEC_TX_EN		0x2004
-			MX51_PAD_DISP2_DAT13__FEC_TX_CLK	0x2180
-			MX51_PAD_EIM_A20__GPIO2_14		0x85
-		>;
-	};
-
-	pinctrl_gpiospi0: gpiospi0grp {
-		fsl,pins = <
-			MX51_PAD_CSI2_D18__GPIO4_11		0x85
-			MX51_PAD_CSI2_D19__GPIO4_12		0x85
-			MX51_PAD_CSI2_HSYNC__GPIO4_14		0x85
-			MX51_PAD_CSI2_PIXCLK__GPIO4_15		0x85
-		>;
-	};
-
-	pinctrl_i2c2: i2c2grp {
-		fsl,pins = <
-			MX51_PAD_KEY_COL4__I2C2_SCL		0x400001ed
-			MX51_PAD_KEY_COL5__I2C2_SDA		0x400001ed
-		>;
-	};
-
-	pinctrl_ipu_disp1: ipudisp1grp {
-		fsl,pins = <
-			MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5
-			MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5
-			MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5
-			MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5
-			MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5
-			MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5
-			MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5
-			MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5
-			MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5
-			MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5
-			MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5
-			MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5
-			MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5
-			MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5
-			MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5
-			MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5
-			MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5
-			MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5
-			MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5
-			MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5
-			MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5
-			MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5
-			MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5
-			MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5
-			MX51_PAD_DI1_PIN2__DI1_PIN2		0x5
-			MX51_PAD_DI1_PIN3__DI1_PIN3		0x5
-			MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	0x5
-		>;
-	};
-
-	pinctrl_panel: panelgrp {
-		fsl,pins = <
-			MX51_PAD_DI1_D0_CS__GPIO3_3		0x85
-		>;
-	};
-
-	pinctrl_pmic: pmicgrp {
-		fsl,pins = <
-			MX51_PAD_GPIO1_4__GPIO1_4		0x1e0
-			MX51_PAD_GPIO1_8__GPIO1_8		0x21e2
-		>;
-	};
-
-	pinctrl_sndgate26mhz: sndgate26mhzgrp {
-		fsl,pins = <
-			MX51_PAD_CSPI1_RDY__GPIO4_26		0x85
-		>;
-	};
-
-	pinctrl_swi2c: swi2cgrp {
-		fsl,pins = <
-			MX51_PAD_GPIO1_2__GPIO1_2		0xc5
-			MX51_PAD_DI1_D1_CS__GPIO3_4		0x400001f5
-		>;
-	};
-
-	pinctrl_swmdio: swmdiogrp {
-		fsl,pins = <
-			MX51_PAD_NANDF_D14__GPIO3_26		0x21e6
-			MX51_PAD_NANDF_D15__GPIO3_25		0x21e6
-		>;
-	};
-
-	pinctrl_ts: tsgrp {
-		fsl,pins = <
-			MX51_PAD_CSI1_D8__GPIO3_12		0x04
-			MX51_PAD_CSI1_D9__GPIO3_13		0x85
-		>;
-	};
-
-	pinctrl_uart1: uart1grp {
-		fsl,pins = <
-			MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
-			MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
-			MX51_PAD_UART1_RTS__UART1_RTS		0x1c4
-			MX51_PAD_UART1_CTS__UART1_CTS		0x1c4
-		>;
-	};
-
-	pinctrl_uart2: uart2grp {
-		fsl,pins = <
-			MX51_PAD_UART2_RXD__UART2_RXD		0xc5
-			MX51_PAD_UART2_TXD__UART2_TXD		0xc5
-		>;
-	};
-
-	pinctrl_uart3: uart3grp {
-		fsl,pins = <
-			MX51_PAD_EIM_D25__UART3_RXD		0x1c5
-			MX51_PAD_EIM_D26__UART3_TXD		0x1c5
-		>;
-	};
-
-	pinctrl_usbgate26mhz: usbgate26mhzgrp {
-		fsl,pins = <
-			MX51_PAD_DISP2_DAT6__GPIO1_19		0x85
-		>;
-	};
-
-	pinctrl_usbh1: usbh1grp {
-		fsl,pins = <
-			MX51_PAD_USBH1_STP__USBH1_STP		0x0
-			MX51_PAD_USBH1_CLK__USBH1_CLK		0x0
-			MX51_PAD_USBH1_DIR__USBH1_DIR		0x0
-			MX51_PAD_USBH1_NXT__USBH1_NXT		0x0
-			MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x0
-			MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x0
-			MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x0
-			MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x0
-			MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x0
-			MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x0
-			MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x0
-			MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x0
-		>;
-	};
-
-	pinctrl_usbh1phy: usbh1phygrp {
-		fsl,pins = <
-			MX51_PAD_NANDF_D0__GPIO4_8		0x85
-		>;
-	};
-
-	pinctrl_usbh2: usbh2grp {
-		fsl,pins = <
-			MX51_PAD_EIM_A26__USBH2_STP		0x0
-			MX51_PAD_EIM_A24__USBH2_CLK		0x0
-			MX51_PAD_EIM_A25__USBH2_DIR		0x0
-			MX51_PAD_EIM_A27__USBH2_NXT		0x0
-			MX51_PAD_EIM_D16__USBH2_DATA0		0x0
-			MX51_PAD_EIM_D17__USBH2_DATA1		0x0
-			MX51_PAD_EIM_D18__USBH2_DATA2		0x0
-			MX51_PAD_EIM_D19__USBH2_DATA3		0x0
-			MX51_PAD_EIM_D20__USBH2_DATA4		0x0
-			MX51_PAD_EIM_D21__USBH2_DATA5		0x0
-			MX51_PAD_EIM_D22__USBH2_DATA6		0x0
-			MX51_PAD_EIM_D23__USBH2_DATA7		0x0
-		>;
-	};
-
-	pinctrl_usbh2phy: usbh2phygrp {
-		fsl,pins = <
-			MX51_PAD_NANDF_D1__GPIO4_7		0x85
-		>;
-	};
-};