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authorFabio Estevam <fabio.estevam@freescale.com>2014-04-29 06:59:36 +0200
committerShawn Guo <shawn.guo@freescale.com>2014-05-16 17:02:05 +0200
commit204d156a81f4825ec7569ec3074cd652a8f1948b (patch)
tree7f7dedfa7f04d4432f6df5ad02e15e2b0f8283aa /arch/arm/boot/dts/imx53-qsb-common.dtsi
parentARM: dts: imx27-phytec-phycore-rdk: Fix "reg" property for USBH2 PHY (diff)
downloadlinux-204d156a81f4825ec7569ec3074cd652a8f1948b.tar.xz
linux-204d156a81f4825ec7569ec3074cd652a8f1948b.zip
ARM: dts: imx53-qsb-common: Add TVE support
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx53-qsb-common.dtsi')
-rw-r--r--arch/arm/boot/dts/imx53-qsb-common.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx53-qsb-common.dtsi b/arch/arm/boot/dts/imx53-qsb-common.dtsi
index ede04fa4161f..df9cd9d41c4f 100644
--- a/arch/arm/boot/dts/imx53-qsb-common.dtsi
+++ b/arch/arm/boot/dts/imx53-qsb-common.dtsi
@@ -272,6 +272,14 @@
>;
};
+ pinctrl_vga_sync: vgasync-grp {
+ fsl,pins = <
+ /* VGA_HSYNC, VSYNC with max drive strength */
+ MX53_PAD_EIM_OE__IPU_DI1_PIN7 0xe6
+ MX53_PAD_EIM_RW__IPU_DI1_PIN8 0xe6
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
@@ -281,6 +289,15 @@
};
};
+&tve {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_vga_sync>;
+ fsl,tve-mode = "vga";
+ fsl,hsync-pin = <4>;
+ fsl,vsync-pin = <6>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;