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author | Shawn Guo <shawn.guo@linaro.org> | 2012-08-02 16:48:39 +0200 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2012-09-11 10:26:51 +0200 |
commit | 4bb6143cbee3c66c23a3f259b5e479608bed0831 (patch) | |
tree | eeeb6aa29c9e98a5be09010777738dce09c9ed7a /arch/arm/boot/dts/imx53.dtsi | |
parent | ARM: dts: imx53-qsb: add pinctrl settings (diff) | |
download | linux-4bb6143cbee3c66c23a3f259b5e479608bed0831.tar.xz linux-4bb6143cbee3c66c23a3f259b5e479608bed0831.zip |
ARM: dts: imx53-ard: add pinctrl settings
Add pinctrl settings for the exsiting devices in imx53-ard.dts.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx53.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx53.dtsi | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 01fa49abab6d..20b67bc5f70b 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -259,6 +259,21 @@ 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */ >; }; + + pinctrl_esdhc1_2: esdhc1grp-2 { + fsl,pins = < + 995 0x1d5 /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */ + 1000 0x1d5 /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */ + 1010 0x1d5 /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */ + 1024 0x1d5 /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */ + 941 0x1d5 /* MX53_PAD_PATA_DATA8__ESDHC1_DAT4 */ + 948 0x1d5 /* MX53_PAD_PATA_DATA9__ESDHC1_DAT5 */ + 955 0x1d5 /* MX53_PAD_PATA_DATA10__ESDHC1_DAT6 */ + 962 0x1d5 /* MX53_PAD_PATA_DATA11__ESDHC1_DAT7 */ + 1005 0x1d5 /* MX53_PAD_SD1_CMD__ESDHC1_CMD */ + 1018 0x1d5 /* MX53_PAD_SD1_CLK__ESDHC1_CLK */ + >; + }; }; esdhc3 { @@ -303,6 +318,13 @@ 354 0x1c5 /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */ >; }; + + pinctrl_uart1_2: uart1grp-2 { + fsl,pins = < + 828 0x1c5 /* MX53_PAD_PATA_DIOW__UART1_TXD_MUX */ + 832 0x1c5 /* MX53_PAD_PATA_DMACK__UART1_RXD_MUX */ + >; + }; }; }; |