diff options
| author | Robin van der Gracht <robin@protonic.nl> | 2022-02-21 10:53:10 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2022-04-06 04:12:32 +0200 |
| commit | 05ed0bc09a5377825b37240c0212a894aa4dad49 (patch) | |
| tree | 6b6463a47d140df01c8d9cb2aa09d86e04073011 /arch/arm/boot/dts/imx6dl-victgo.dts | |
| parent | ARM: dts: imx6qdl-vicut1: update gpio-line-names for some GPIOs (diff) | |
| download | linux-05ed0bc09a5377825b37240c0212a894aa4dad49.tar.xz linux-05ed0bc09a5377825b37240c0212a894aa4dad49.zip | |
ARM: dts: imx6dl-victgo: Add interrupt-counter nodes
Interrupt counter is mainlined, now we can add missing counter nodes.
Signed-off-by: Robin van der Gracht <robin@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl-victgo.dts')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-victgo.dts | 41 |
1 files changed, 40 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6dl-victgo.dts b/arch/arm/boot/dts/imx6dl-victgo.dts index d542ddad4e32..3d6dc1b2c5e9 100644 --- a/arch/arm/boot/dts/imx6dl-victgo.dts +++ b/arch/arm/boot/dts/imx6dl-victgo.dts @@ -54,6 +54,27 @@ }; }; + counter-0 { + compatible = "interrupt-counter"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_counter0>; + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + }; + + counter-1 { + compatible = "interrupt-counter"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_counter1>; + gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + }; + + counter-2 { + compatible = "interrupt-counter"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_counter2>; + gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; + }; + gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; @@ -400,7 +421,7 @@ &gpio2 { gpio-line-names = - "", "", "", "", "", "", "", "", + "YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "", "", "LED_PWM", "", "", "", "", "", "", "", "", "", "", "", "", "ISB_IN1", "ON_SWITCH", @@ -708,6 +729,24 @@ >; }; + pinctrl_counter0: counter0grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b000 + >; + }; + + pinctrl_counter1: counter1grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b000 + >; + }; + + pinctrl_counter2: counter2grp { + fsl,pins = < + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b000 + >; + }; + pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 |