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authorFabio Estevam <fabio.estevam@nxp.com>2016-04-25 22:37:17 +0200
committerShawn Guo <shawnguo@kernel.org>2016-04-26 13:52:20 +0200
commit46350b71a09ccf3573649e03db55d4b61d5da231 (patch)
tree17755c77a64a90fd558268920bd9bd9273c9b47e /arch/arm/boot/dts/imx6dl.dtsi
parentARM: dts: imx6sx: Add 198MHz operating point (diff)
downloadlinux-46350b71a09ccf3573649e03db55d4b61d5da231.tar.xz
linux-46350b71a09ccf3573649e03db55d4b61d5da231.zip
ARM: dts: imx6dl: Fix the VDD_ARM_CAP voltage for 396MHz operation
Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015): http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf states the following: "LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation up to 396 MHz." So fix the entry by adding the 25mV margin value as done in the other entries of the table, which results in 1.15V for 396MHz operation. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index c13a73aa55ca..9a4c22c2dade 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -30,7 +30,7 @@
/* kHz uV */
996000 1250000
792000 1175000
- 396000 1075000
+ 396000 1150000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */