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| author | Dinh Nguyen <dinguyen@kernel.org> | 2018-07-09 20:47:20 +0200 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-08-30 15:38:26 +0200 |
| commit | 12b2982a1f72ce453d76da977e1dad422b2f34ad (patch) | |
| tree | 7d0039f6f439f8ad135e9db9bbbe27f4886ff24c /arch/arm/boot/dts/imx6q-mccmon6.dts | |
| parent | ARM: dts: socfpga: set timer interrupt to edge sensitive (diff) | |
| download | linux-12b2982a1f72ce453d76da977e1dad422b2f34ad.tar.xz linux-12b2982a1f72ce453d76da977e1dad422b2f34ad.zip | |
ARM: dts: arria10: update NAND clocking
The NAND IP needs 3 clocks(nand_x_clk, nand_clk, and nand_ecc_clk). This
patch adds a nand_clk, which is derived from the nand_x_clk, but has a
fixed divider of 4, and the nand_ecc_clk, which is derived from the
nand_x_clk.
Update the NAND node to use the additional clocks.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add nand_ecc_clk and update commit message
Diffstat (limited to 'arch/arm/boot/dts/imx6q-mccmon6.dts')
0 files changed, 0 insertions, 0 deletions