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authorThierry Reding <thierry.reding@gmail.com>2013-08-09 16:49:26 +0200
committerStephen Warren <swarren@nvidia.com>2013-08-12 22:19:30 +0200
commite07e3dbd9c8f84ff37c117eb1ff80f3f41a4df4b (patch)
tree95c195e9ff9123ccbac53e8ee924609fe8a20e04 /arch/arm/boot/dts/imx6q-sbc6x.dts
parentARM: tegra: trimslice: Initialize PCIe from DT (diff)
downloadlinux-e07e3dbd9c8f84ff37c117eb1ff80f3f41a4df4b.tar.xz
linux-e07e3dbd9c8f84ff37c117eb1ff80f3f41a4df4b.zip
ARM: tegra: Add Tegra30 PCIe support
Add the top-level pcie-controller node for the Tegra30 SoC. Tegra30 has three root ports that can use different lane layouts. Signed-off-by: Jay Agarwal <jagarwal@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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