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authorAnson Huang <b20788@freescale.com>2014-12-05 09:23:48 +0100
committerShawn Guo <shawn.guo@linaro.org>2015-01-05 13:43:49 +0100
commiteabb3227d912f554237bf2a0920108cb6e372eb0 (patch)
tree09a8a59fe71b3d9f2719c20adc98efe1694c4044 /arch/arm/boot/dts/imx6q.dtsi
parentARM: dts: sabrelite: add i2c3 (diff)
downloadlinux-eabb3227d912f554237bf2a0920108cb6e372eb0.tar.xz
linux-eabb3227d912f554237bf2a0920108cb6e372eb0.zip
ARM: dts: imx6q: update cpufreq volt/freq table
According to latest i.MX6Q datasheet Rev. 3, 02/2014, the latest cpufreq volt/freq table is as below: LDO enabled/bypassed(min value): 996MHz: VDDARM: 1.225V, VDDSOC: 1.150V; 792MHz: VDDARM: 1.150V, VDDSOC: 1.150V; 396MHz: VDDARM: 0.925V, VDDSOC: 1.150V; the 792MHz setpoint's VDDARM min voltage is updated from 1.125V to 1.150V, adding 25mV to cover board IR drop, 1.175V is the right voltage we should use. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 85f72e6b5bad..37ee4e588910 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -31,7 +31,7 @@
1200000 1275000
996000 1250000
852000 1250000
- 792000 1150000
+ 792000 1175000
396000 975000
>;
fsl,soc-operating-points = <