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authorStefan Agner <stefan@agner.ch>2018-07-09 17:48:44 +0200
committerShawn Guo <shawnguo@kernel.org>2018-07-11 15:00:48 +0200
commit147299a8fc3a70f02984a6d6a042d0cbf53c46f9 (patch)
treeecb622fe6a2c60ad97625317c7222294b8e00e89 /arch/arm/boot/dts/imx6qdl-apalis.dtsi
parentARM: dts: imx6qdl-apalis/-colibri: prevent 1.8V modes (diff)
downloadlinux-147299a8fc3a70f02984a6d6a042d0cbf53c46f9.tar.xz
linux-147299a8fc3a70f02984a6d6a042d0cbf53c46f9.zip
ARM: dts: imx6qdl-apalis/-colibri: disable read-only switch
Use the disable-wp to indicate that Apalis and Colibri iMX6 do not make use of the native write-protect signal available on the i.MX 6 SoCs. This prevents warnings: mmc0: host does not support reading read-only switch, assuming write-enable Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-apalis.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-apalis.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 55bcea245df6..f9bacc9ff2b6 100644
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -457,6 +457,7 @@
pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>;
vqmmc-supply = <&reg_3p3v>;
bus-width = <8>;
+ disable-wp;
no-1-8-v;
status = "disabled";
};
@@ -467,6 +468,7 @@
pinctrl-0 = <&pinctrl_usdhc2>;
vqmmc-supply = <&reg_3p3v>;
bus-width = <4>;
+ disable-wp;
no-1-8-v;
status = "disabled";
};