diff options
| author | Tim Harvey <tharvey@gateworks.com> | 2015-11-19 21:02:03 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2015-12-22 13:42:25 +0100 |
| commit | aa2b21783b1321e9d7f3ee92eb8e034f41447569 (patch) | |
| tree | 7e2f5b706f46243bb0d8f29a79527ad9361f5193 /arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | |
| parent | ARM: dts: vf6xx: Cosmic+: M4(nommu) initial support (diff) | |
| download | linux-aa2b21783b1321e9d7f3ee92eb8e034f41447569.tar.xz linux-aa2b21783b1321e9d7f3ee92eb8e034f41447569.zip | |
ARM: dts: imx: ventana: add PWM nodes for Ventana boards
Ventana boards have an off-board connector with signals that can be pinmuxed
as either GPIO or PWM. This patch adds pwm device-tree nodes in the disabled
state which the bootloader can decide to enable based on bootloader config.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-gw51xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi index dc0cebfe22d7..5cd16f2178b8 100644 --- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi @@ -174,6 +174,24 @@ status = "okay"; }; +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ + status = "disabled"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ + status = "disabled"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ + status = "disabled"; +}; + &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -294,6 +312,24 @@ >; }; + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 |