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authorDmitry Lavnikevich <d.lavnikevich@sam-solutions.com>2014-11-04 14:05:47 +0100
committerShawn Guo <shawn.guo@linaro.org>2014-11-23 08:08:11 +0100
commitd76fab80ef32a7421feb7b71b6e2fdddf3a036fd (patch)
tree6cbb2bd8b47eb2feaff365cc01b1e10c94826560 /arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
parentARM: dts: vf500-colibri: add Colibri VF50 support (diff)
downloadlinux-d76fab80ef32a7421feb7b71b6e2fdddf3a036fd.tar.xz
linux-d76fab80ef32a7421feb7b71b6e2fdddf3a036fd.zip
ARM: dts: pbab01: move i2c pins and frequency configuration into pfla02
Since pins and frequency are specific to module (pfla02), not base board (pbab02), it is better to be initialized in corresponding dts file. This patch fixes i2c2, i2c3 pin configuration which caused messages: imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/i2c2grp imx6q-pinctrl 20e0000.iomuxc: no groups defined in /soc/aips-bus@02000000/iomuxc@020e0000/i2c3grp imx6q-pinctrl 20e0000.iomuxc: unable to find group for node i2c2grp imx6q-pinctrl 20e0000.iomuxc: unable to find group for node i2c3grp Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi22
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
index 584721264121..f1bdcae5b97d 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
@@ -28,9 +28,6 @@
};
&i2c2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c2>;
- clock-frequency = <100000>;
status = "okay";
tlv320@18 {
@@ -55,9 +52,6 @@
};
&i2c3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c3>;
- clock-frequency = <100000>;
status = "okay";
};
@@ -84,19 +78,3 @@
&usdhc3 {
status = "okay";
};
-
-&iomuxc {
- pinctrl_i2c2: i2c2grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
- MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
- >;
- };
-
- pinctrl_i2c3: i2c3grp {
- fsl,pins = <
- MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
- MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
- >;
- };
-};