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authorPhilipp Zabel <p.zabel@pengutronix.de>2014-04-14 17:37:30 +0200
committerShawn Guo <shawn.guo@freescale.com>2014-05-16 17:01:55 +0200
commit14e2833da3811805dbf1a5276adcb21398e93ab6 (patch)
tree4b7fd0e1ab3538825d5f6f371a203d8a0e6e355f /arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
parentARM: dts: pbab01: Add I2C devices (diff)
downloadlinux-14e2833da3811805dbf1a5276adcb21398e93ab6.tar.xz
linux-14e2833da3811805dbf1a5276adcb21398e93ab6.zip
ARM: dts: pfla02: Add UART1 (uart3)
The pins labeled UART1 on the module connector are wired to i.MX6 uart3. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index 69361771274c..faa3494a69d4 100644
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -235,6 +235,15 @@
>;
};
+ pinctrl_uart3: uart3grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+ MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1
+ MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1
+ >;
+ };
+
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
@@ -302,6 +311,12 @@
status = "disabled";
};
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3>;
+ status = "disabled";
+};
+
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;