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author | Troy Kisky <troy.kisky@boundarydevices.com> | 2013-12-17 02:12:57 +0100 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2014-02-09 14:29:27 +0100 |
commit | 8c766cb4d48662efe655241cede0382360a891c0 (patch) | |
tree | 7f133d57641a706317b0263a44cc4f5559579cf3 /arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | |
parent | ARM: dts: imx6qdl-sabrelite: move phy reset to pinctrl_enet (diff) | |
download | linux-8c766cb4d48662efe655241cede0382360a891c0.tar.xz linux-8c766cb4d48662efe655241cede0382360a891c0.zip |
ARM: dts: imx6qdl-sabrelite: explicitly set pad for SGTL5000 sys_mclk
Explicitly sets the pad GPIO_0 (sys_mclk) to 0x030b0.
Before this patch, it has the value 0x130b0 if using mainline u-boot.
So this patch also removes hysteresis. The 100k pulldown remains so
that a disabled clock will be low.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-sabrelite.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi index bbc05830c431..32dd77fbe09f 100644 --- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi @@ -114,7 +114,8 @@ imx6q-sabrelite { pinctrl_hog: hoggrp { fsl,pins = < - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000 + /* SGTL5000 sys_mclk */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 >; }; |